UPD78F9222MC(T)-5A4-A NEC, UPD78F9222MC(T)-5A4-A Datasheet - Page 244

• Manufacturer Part Number: UPD78F9222MC(T)-5A4-A
• Description: 8BIT MCU, 4K FLASH, 256B RAM, 78F9222
• Manufacturer: NEC

Specifications of UPD78F9222MC(T)-5A4-A

• Controller Family/series: UPD78
• No. Of I/o's: 17
• Ram Memory Size: 256Byte
• Cpu Speed: 10MHz
• No. Of Timers: 4
• No. Of: RoHS Compliant
• Core Size: 8bit
• Program Memory Size: 4KB
• Oscillator Type: External, Internal

244
High-speed internal oscillation clock or
High-speed internal oscillation clock or
Notes 1.
Remark When reset is effected, P130 outputs a low level. If P130 is set to output a high level before reset is
Notes 1.
2.
2.
effected, the output signal of P130 can be dummy-output as the reset signal to the CPU.
The operation stop time is 277
Set high level output using software.
The operation stop time is 276
Set high level output using software.
Internal reset signal
external clock input
external clock input
Internal reset signal
(except P130)
(except P130)
<1> With high-speed internal oscillation clock or external clock input
CPU clock
CPU clock
Port pin
Port pin
RESET
Port pin
RESET
Port pin
(P130)
(P130)
Figure 14-4. Reset Timing by RESET Input in STOP Mode
in progress
in progress
operation
operation
Normal
STOP instruction is executed.
STOP instruction is executed.
Normal
<2> With crystal/ceramic oscillation clock
CHAPTER 14 RESET FUNCTION
User’s Manual U16898EJ5V0UD
µ
µ
s (MIN.), 544
s (MIN.), 544
(oscillation stops)
(oscillation stops)
Stop status
Stop status
100 ns (TYP.)
100 ns (TYP.)
Delay
Delay
(oscillation stops)
(oscillation stops)
µ
µ
Reset period
Reset period
s (TYP.), and 1.075 ms (MAX.).
s (TYP.), and 1.074 ms (MAX.).
100 ns (TYP.)
100 ns (TYP.)
Delay
Delay
Oscillation stabilization
time (2
Operation stops because option
byte is referenced
Operation stops because option
byte is referenced
10
/f
Normal operation (reset processing, CPU clock)
X
to 2
Hi-Z
Hi-Z
17
/f
X
)
Normal operation
(reset processing, CPU clock)
Note 1
Note 1
.
.
Note 2
Note 2