JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 67

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JN5148-001

Manufacturer Part Number
JN5148-001
Description
32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
Manufacturer
Jennic LTD
Datasheet

Specifications of JN5148-001

No. Of I/o's
21
Eeprom Memory Size
128KB
Ram Memory Size
128KB
Cpu Speed
32MHz
No. Of Timers
3
No. Of Pwm Channels
3
Digital Ic Case Style
QFN
Core Size
32bit
Oscillator Type
External
Peripherals
ADC, DAC, PWM, Timer
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
JN5148-001
Manufacturer:
JENNIC
Quantity:
20 000
Part Number:
JN5148-001-M04
Manufacturer:
IXYS
Quantity:
2 300
22.3.4 Two-wire Serial Interface
Note 1: This figure indicates the pulse width that is guaranteed to be suppressed. Pulse with widths up to 125nsec
may alos get suppressed.
© Jennic 2009
Clock period
Data setup time
Data hold time
Data invalid period
Select set-up period
Select hold period
Select asserted to output data driven
Select negated to data output tri-stated
SIF_CLK clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated
LOW period of the SIF_CLK clock
HIGH period of the SIF_CLK clock
Set-up time for repeated START condition
Data setup time SIF_D
Rise Time SIF_D and SIF_CLK
Fall Time SIF_D and SIF_CLK
Set-up time for STOP condition
Bus free time between a STOP and START
condition
Pulse width of spikes that will be
suppressed by input filters (Note 1)
Capacitive load for each bus line
Noise margin at the LOW level for each
connected device (including hysteresis)
Noise margin at the HIGH level for each
connected device (including hysteresis)
SIF_CLK
SIF_D
t
F
S
Parameter
Parameter
t
HD;STA
t
LOW
Figure 46: Two-wire Serial Interface Timing
t
R
t
HD;DAT
JN-DS-JN5148-001 1v2
t
HIGH
t
Symbol
SU;DAT
Symbol
t
t
t
t
HD:STA
SU:STA
SU:DAT
SU:STO
t
t
f
t
HIGH
V
Preliminary
LOW
t
V
BUF
C
t
SCL
t
t
F
SP
t
t
t
t
t
R
F
nh
t
t
sss
ssh
t
nl
ck
vo
hz
b
si
hi
lz
t
SU;STA
0.1VDD
0.2VDD
Standard Mode
0.25
Min
Sr
4.7
4.7
4.7
0
4
4
4
-
-
-
-
125.0
t
HD;STA
Min
15
15
15
15
-
1000
Max
100
300
400
60
-
-
-
-
-
-
-
-
-
20+0.1Cb
20+0.1Cb
0.1VDD
0.2VDD
t
SP
Min
0.6
1.3
0.6
0.6
0.1
0.6
1.3
0
Fast Mode
-
-
Max
t
40
20
20
SU;STO
-
-
-
-
t
R
P
Max
400
300
300
400
60
-
-
-
-
-
-
-
-
-
t
BUF
Jennic
Unit
ns
ns
ns
ns
ns
ns
ns
ns
S
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
pF
ns
ns
ns
V
V
67

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