JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 16

• Manufacturer Part Number: JN5148-001
• Description: 32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
• Manufacturer: Jennic LTD

Specifications of JN5148-001

• No. Of I/o's: 21
• Eeprom Memory Size: 128KB
• Ram Memory Size: 128KB
• Cpu Speed: 32MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 3
• Digital Ic Case Style: QFN
• Core Size: 32bit
• Oscillator Type: External
• Peripherals: ADC, DAC, PWM, Timer
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Jennic
4 Memory Organisation
This section describes the different memories found within the JN5148. The device contains ROM, RAM, OTP eFuse
memory, the wireless transceiver and peripherals all within the same linear address space.
4.1 ROM
The ROM is 128k bytes in size, and can be accessed by the processor in a single CPU clock cycle. The ROM
contents include bootloader to allow external Flash memory contents to be bootloaded into RAM at runtime, a default
interrupt vector table, an interrupt manager, IEEE802.15.4 MAC and APIs for interfacing on-chip peripherals. The
operation of the boot loader is described in detail in Application Note [8]. The interrupt manager routes interrupt calls
to the application’s soft interrupt vector table contained within RAM. Section 7 contains further information regarding
the handling of interrupts. ROM contents are shown in Figure 6.
16
Figure 6: Typical ROM contents
Figure 5: JN5148 Memory Map
0x00020000
0x00000000
0xFFFFFFFF
0x04000000
0x00020000
0x00000000
0xF0000000
0x02000000
0xF0020000
Unpopulated
JN-DS-JN5148-001 1v2
Preliminary
Interrupt Manager
Interrupt Vectors
IEEE802.15.4
Boot Loader
Peripherals
RAM Echo
(128kB)
(128kB)
Spare
RAM
ROM
Stack
APIs
© Jennic 2009