JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 63

• Manufacturer Part Number: JN5148-001
• Description: 32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
• Manufacturer: Jennic LTD

Specifications of JN5148-001

• No. Of I/o's: 21
• Eeprom Memory Size: 128KB
• Ram Memory Size: 128KB
• Cpu Speed: 32MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 3
• Digital Ic Case Style: QFN
• Core Size: 32bit
• Oscillator Type: External
• Peripherals: ADC, DAC, PWM, Timer
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

22.2.2 DC Current Consumption
VDD = 2.0 to 3.6V, -40 to +85º C
22.2.2.1 Active Processing
CPU processing
32,16,8 or 4MHz
Radio transmit
Radio receive
The following current figures should be added to those above if the feature is being used
ADC
DAC
Comparator
UART
Timer
2-wire serial interface
22.2.2.2 Sleep Mode
Sleep mode with I/O wakeup
Sleep mode with I/O and RC
Oscillator timer wakeup –
measured at 25ºC
32kHz crystal oscillator
The following current figures should be added to those above if the feature is being used
RAM retention– measured at
25ºC
Comparator (low-power mode)
22.2.2.3 Deep Sleep Mode
Deep sleep mode– measured
at 25ºC
© Jennic 2009
Mode:
Mode:
Mode:
Min
Min
Min
JN-DS-JN5148-001 1v2
215 / 235
280/MHz
73 / 0.8
1600 +
Typ
15.0
17.5
Typ
0.12
1.25
Typ
655
100
1.5
2.2
0.8
90
30
70
Preliminary
Max
Max
Max
Unit
Unit
Unit
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
nA
SPI, GPIOs enabled. When in
CPU doze the current related to
CPU speed is not consumed.
CPU in software doze – radio
transmitting
CPU in software doze – radio in
receive mode
Temperature sensor and battery
measurements require ADC
One / both
Fast response time / low-power
For each UART
For each Timer
Waiting on I/O event
As above, but also waiting on timer
event. If both wakeup timers are
enabled then add another 0.05µA
As alternative sleep timer
For full 128kB retained
Reduced response time
Waiting on chip RESET or I/O
event
Notes
Notes
Notes
Jennic
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