JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 17

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JN5148-001

Manufacturer Part Number
JN5148-001
Description
32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
Manufacturer
Jennic LTD
Datasheet

Specifications of JN5148-001

No. Of I/o's
21
Eeprom Memory Size
128KB
Ram Memory Size
128KB
Cpu Speed
32MHz
No. Of Timers
3
No. Of Pwm Channels
3
Digital Ic Case Style
QFN
Core Size
32bit
Oscillator Type
External
Peripherals
ADC, DAC, PWM, Timer
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
JN5148-001
Manufacturer:
JENNIC
Quantity:
20 000
Part Number:
JN5148-001-M04
Manufacturer:
IXYS
Quantity:
2 300
4.2 RAM
The JN5148 contains 128kBytes of high speed RAM. It can be used for both code and data storage and is accessed
by the CPU in a single clock cycle. At reset, a boot loader controls the loading of segments of code and data from an
external memory connected to the SPI port, into RAM. Software can control the power supply to the RAM allowing
the contents to be maintained during a sleep period when other parts of the device are un-powered. Typical RAM
contents are shown in Figure 7.
4.3 OTP eFuse Memory
The JN5148 contains a total of 32bytes of eFuse memory; this is a One Time Programmable (OTP) memory that is
used to support on chip 64-bit MAC ID and a 128-bit AES security key. A limited number of bits are available for
customer use for storage of configuration information; configuration of these is made through use of software APIs.
For full details on how to program and use the eFuse memory, please refer to application note JN-AN-1062 Using
OTP efuse Memory [2]
Alternatively, Jennic can provide an eFuse programming service for customers that wish to use the eFuse but do not
wish to undertake this for themselves. For further details of this service, please contact your local Jennic sales office.
4.4 External Memory
An external memory with an SPI interface may be used to provide storage for program code and data for the device
when external power is removed. The memory is connected to the SPI interface using select line SPISEL0; this
select line is dedicated to the external memory interface and is not available for use with other external devices. See
Figure 8 for connection details.
© Jennic 2009
Figure 8: Connecting External Serial Memory
0x04020000
0x04000000
SPIMISO
SPIMOSI
SPISEL0
SPICLK
JN5148
Figure 7: Typical RAM Contents
JN-DS-JN5148-001 1v2
Preliminary
Interrupt Vector Table
(Grows Down)
MAC Address
CPU Stack
Application
MAC Data
SS
SDO
SDI
CLK
Memory
Serial
Jennic
17

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