JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 36

• Manufacturer Part Number: JN5148-001
• Description: 32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
• Manufacturer: Jennic LTD

Specifications of JN5148-001

• No. Of I/o's: 21
• Eeprom Memory Size: 128KB
• Ram Memory Size: 128KB
• Cpu Speed: 32MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 3
• Digital Ic Case Style: QFN
• Core Size: 32bit
• Oscillator Type: External
• Peripherals: ADC, DAC, PWM, Timer
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Jennic
11 Timers
11.1 Peripheral Timer/Counters
Three general-purpose timer/counter units are available that can be independently configured to operate in one of
five possible modes. Timer 0 and 1 support all 5 modes of operation and Timer 2 supports PWM and Delta-Sigma
modes only. The timers have the following:
36
TIMxCK_GT
TIMxCAP
SYSCLK
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5-bit prescaler, divides system clock by 2
Clocked from internal system clock (16MHz)
16-bit counter, 16-bit Rise and Fall (period) registers
Timer: can generate interrupts off Rise and Fall counts. Can be gated by external signal
Counter: counts number of transitions on external event signal. Can use low-high, high-low or both
transitions
PWM/Single pulse: outputs repeating Pulse Width Modulation signal or a single pulse. Can set period and
mark-space ratio
Capture: measures times between transitions of an applied signal
Delta-Sigma: Return-To-Zero (RTZ) and Non-Return-to-Zero (NRZ) modes
Timer usage of external IO can be controlled on a pin by pin basis
Select
Edge
Generator
Prescaler
Capture
Capture
Enable
Reset
Gate
Gate
S/w
Reset Generator
Delta-Sigma
Counter
PWM/Δ−Σ
Figure 22: Timer Unit Block Diagram
PWM/Δ−Σ
System
Reset
Rise
Fall
JN-DS-JN5148-001 1v2
Single
Reset
Shot
prescale value
Preliminary
INT
as the clock to the timer (prescaler range is 0 to 16)
Generator
Int Enable
Interrupt
=
=
S
R
PWM/Delta-
Sigma
OE
© Jennic 2009
TIMxOUT