NUMICRO-SDK Nuvoton Technology Corporation of America, NUMICRO-SDK Datasheet - Page 477
![KIT EVAUATION NUC100/120/130/140](/photos/18/31/183177/numicro-sdk_sml.jpg)
NUMICRO-SDK
Manufacturer Part Number
NUMICRO-SDK
Description
KIT EVAUATION NUC100/120/130/140
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets
1.NUC100LC1BN.pdf
(600 pages)
2.NUMICRO-SDK.pdf
(13 pages)
3.NUMICRO-SDK.pdf
(93 pages)
4.NUMICRO-SDK.pdf
(1 pages)
Specifications of NUMICRO-SDK
Contents
Board, Cable, CD, Nu-Link
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC100, NUC120, NUC130, NUC140
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
Nuvoton Technology Corporation
Quantity:
135
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
NuvoTon
Quantity:
69
- NUC100LC1BN PDF datasheet
- NUMICRO-SDK PDF datasheet #2
- NUMICRO-SDK PDF datasheet #3
- NUMICRO-SDK PDF datasheet #4
- Current page: 477 of 600
- Download datasheet (6Mb)
I
Register
I2S_IE
Bits
[31:13]
[12]
[11]
[10]
[9]
[8]
[7:3]
2
S Interrupt Enable Register (I2S_IE)
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
I2S_BA+0x08
Descriptions
Reserved
LZCIE
RZCIE
TXTHIE
TXOVFIE
TXUDFIE
Reserved
Reserved
30
22
14
6
Reserved
R/W
R/W
Reserved
Left channel zero cross interrupt enable
Interrupt occur if this bit is set to 1 and left channel zero cross
1 = Enable interrupt
0 = Disable interrupt
Right channel zero cross interrupt enable
1 = Enable interrupt
0 = Disable interrupt
Transmit FIFO threshold level interrupt enable
Interrupt occurs if this bit is set to 1 and data words in transmit FIFO is less than
TXTH[2:0].
1 = Enable interrupt
0 = Disable interrupt
Transmit FIFO overflow interrupt enable
Interrupt occurs if this bit is set to 1 and transmit FIFO overflow flag is set to 1
1 = Enable interrupt
0 = Disable interrupt
Transmit FIFO underflow interrupt enable
Interrupt occur if this bit is set to 1 and transmit FIFO underflow flag is set to 1.
1 = Enable interrupt
0 = Disable interrupt
Reserved
29
21
13
5
Description
I
2
S Interrupt Enable Register
LZCIE
28
20
12
4
- 477 -
Reserved
Reserved
RZCIE
27
19
11
3
Publication Release Date: Oct 22, 2010
RXTHIE
TXTHIE
26
18
10
2
RXOVFIE
TXOVFIE
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
RXUDFIE
TXUDFIE
24
16
8
0
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