NUMICRO-SDK Nuvoton Technology Corporation of America, NUMICRO-SDK Datasheet - Page 370
NUMICRO-SDK
Manufacturer Part Number
NUMICRO-SDK
Description
KIT EVAUATION NUC100/120/130/140
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Type
MCUr
Datasheets
1.NUC100LC1BN.pdf
(600 pages)
2.NUMICRO-SDK.pdf
(13 pages)
3.NUMICRO-SDK.pdf
(93 pages)
4.NUMICRO-SDK.pdf
(1 pages)
Specifications of NUMICRO-SDK
Contents
Board, Cable, CD, Nu-Link
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
NUC100, NUC120, NUC130, NUC140
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
Nuvoton Technology Corporation
Quantity:
135
Company:
Part Number:
NUMICRO-SDK
Manufacturer:
NuvoTon
Quantity:
69
- NUC100LC1BN PDF datasheet
- NUMICRO-SDK PDF datasheet #2
- NUMICRO-SDK PDF datasheet #3
- NUMICRO-SDK PDF datasheet #4
- Current page: 370 of 600
- Download datasheet (6Mb)
5.10.6 Register Description
Timer Control Register (TCSR)
Register
TCSR0
TCSR1
TCSR2
TCSR3
Bits
[31]
[30]
[29]
[28:27]
Reserved
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
TMR_BA01+0x00 R/W
TMR_BA01+0x20 R/W
TMR_BA23+0x00 R/W
TMR_BA23+0x20 R/W
Descriptions
Reserved
CEN
IE
MODE
CEN
30
22
14
6
R/W
Reserved
Timer Enable Bit
1 = Starts counting
0 = Stops/Suspends counting
Note1: In stop status, and then set CEN to 1 will enables the 24-bit up-timer keeps up
counting from the last stop counting value.
Note2: This bit is auto-cleared by hardware in one-shot mode (MODE [28:27] =00)
when the associated timer interrupt is generated (IE [29] =1).
Interrupt Enable Bit
1 = Enable timer Interrupt
0 = Disable timer Interrupt
If timer interrupt is enabled, the timer asserts its interrupt signal when the associated
up-timer value is equal to TCMPR.
Timer Operating Mode
29
21
13
MODE
00
IE
5
Description
Timer0 Control and Status Register
Timer1 Control and Status Register
Timer2 Control and Status Register
Timer3 Control and Status Register
Reserved
28
20
12
PRESCALE[7:0]
4
- 370 -
MODE[1:0]
Reserved
Timer Operating Mode
The timer is operating in the one-shot mode. The associated interrupt
signal is generated once (if IE is enabled) and CEN is automatically
27
19
11
3
Publication Release Date: Dec. 22, 2010
CRST
26
18
10
2
CACT
25
17
9
1
Revision V1.06
Reset Value
0x0000_0005
0x0000_0005
0x0000_0005
0x0000_0005
TDR_EN
CTB
24
16
8
0
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