PCF85132U/2DA/1,02 NXP Semiconductors, PCF85132U/2DA/1,02 Datasheet - Page 26

• Manufacturer Part Number: PCF85132U/2DA/1,02
• Description: IC LCD DISPLAY DRVR UNCASED
• Manufacturer: NXP Semiconductors

Specifications of PCF85132U/2DA/1,02

• Display Type: LCD
• Configuration: Multiple
• Interface: I²C
• Digits Or Characters: Any Digit Type
• Current - Supply: 60µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PCF85132
Product data sheet
7.17 Command decoder
In this way it is possible to configure the device and then fill the display RAM with little
overhead.
The command bytes and control bytes are also acknowledged by all addressed
PCF85132 connected to the bus.
The display bytes are stored in the display RAM at the address specified by the data
pointer and the subaddress counter; see
The acknowledgement after each byte is made only by the (A0 and A1) addressed
PCF85132. After the last (display) byte, the I
Alternatively a START may be asserted to RESTART an I
The command decoder identifies command bytes that arrive on the I
commands available to the PCF85132 are defined in
Table 9.
Table 10.
[1]
[2]
Command
Bit
mode-set
load-data-pointer-MSB
load-data-pointer-LSB
device-select
bank-select
blink-select
frame-frequency-prescaler
Bit
7 to 4
3
2
1 to 0
Power-on and reset value.
The possibility to disable the display allows implementation of blinking under external control; the enable bit
determines also whether the internal clock signal is available at the CLK pin (see
page
16).
Definition of PCF85132 commands
Mode-set command bit description
Symbol
-
E
B
M[1:0]
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 23 November 2010
Operation code
7
1
0
0
1
1
1
1
Value
1100
0
1
0
1
01
10
11
00
[1]
[1]
[1]
6
1
0
1
1
1
1
1
0
0
1
5
0
1
1
1
Description
display status
LCD bias configuration
LCD drive mode selection
fixed value
Section 7.11
disabled (blank)
enabled
1
1
static; BP0
1:2 multiplex; BP0, BP1
1:3 multiplex; BP0, BP1, BP2
1:4 multiplex; BP0, BP1, BP2, BP3
⁄
⁄
3
2
2
bias
bias
C-bus master issues a STOP condition (P).
4
0
0
0
0
1
1
0
3
E
P[7:4]
P[3:0]
0
1
0
1
LCD driver for low multiplex rates
Table
and
[2]
2
C-bus access.
Section
2
B
0
0
AB
F[2:0]
9.
1
M[1:0]
A[1:0]
I
BF[1:0]
7.12.
PCF85132
2
Section 7.5.1 on
C-bus. The
© NXP B.V. 2010. All rights reserved.
0
O
Reference
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
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