PCF85132U/2DA/1,02 NXP Semiconductors, PCF85132U/2DA/1,02 Datasheet - Page 18

• Manufacturer Part Number: PCF85132U/2DA/1,02
• Description: IC LCD DISPLAY DRVR UNCASED
• Manufacturer: NXP Semiconductors

Specifications of PCF85132U/2DA/1,02

• Display Type: LCD
• Configuration: Multiple
• Interface: I²C
• Digits Or Characters: Any Digit Type
• Current - Supply: 60µA
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
PCF85132
Product data sheet
When display data is transmitted to the PCF85132 the received display bytes are stored in
the display RAM in accordance with the selected LCD drive mode. The data is stored as it
arrives and does not wait for the acknowledge cycle as with the commands. Depending on
the current multiplex drive mode, data is stored singularly, in pairs, triples, or quadruples.
To illustrate the filling order, an example of a 7-segment numeric display showing all drive
modes is given in
LCD types.
The following applies to
Fig 11. Display RAM bitmap
•
•
•
•
In static drive mode the eight transmitted data bits are placed in row 0 as one byte.
In 1:2 multiplex drive mode the eight transmitted data bits are placed in pairs into
row 0 and 1 as two successive 4-bit RAM words.
In 1:3 multiplex drive mode the eight bits are placed in triples into row 0, 1, and 2 as
three successive 3-bit RAM words, with bit 3 of the third address left unchanged. It is
not recommended to use this bit in a display because of the difficult addressing. This
last bit may, if necessary, be controlled by an additional transfer to this address but
care should be taken to avoid overwriting adjacent data because always full bytes are
transmitted.
In 1:4 multiplex drive mode, the eight transmitted data bits are placed in quadruples
into row 0, 1, 2, and 3 as two successive 4-bit RAM words.
display RAM rows/
backplane outputs
The display RAM bitmap shows the direct relationship between the display RAM addresses and
the segment outputs; and between the bits in a RAM word and the backplane outputs.
rows
(BP)
All information provided in this document is subject to legal disclaimers.
Figure
Rev. 1 — 23 November 2010
0
1
2
3
Figure
0
12; the RAM filling organization depicted applies equally to other
1
12:
2
3
display RAM addresses/segment outputs (S)
4
columns
LCD driver for low multiplex rates
155 156 157 158 159
PCF85132
© NXP B.V. 2010. All rights reserved.
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