WM8985GEFL Wolfson Microelectronics, WM8985GEFL Datasheet - Page 25

Audio CODECs Multimedia CODEC with Class D HP

WM8985GEFL

Manufacturer Part Number
WM8985GEFL
Description
Audio CODECs Multimedia CODEC with Class D HP
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8985GEFL

Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-32
Minimum Operating Temperature
- 25 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Production Data
Figure 11 DAC Power Up and Down Sequence (not to scale)
w
1.
2.
3.
4.
5.
6.
Notes:
The analogue input pin charge time, t
time is dependent upon the value of VMID decoupling capacitor and VMID pin input resistance
and AVDD1 power supply rise time.
The analogue input pin discharge time, t
capacitor discharge time. The time, t
analogue input but will vary dependent upon the value of input coupling capacitor.
While the ADC is enabled there will be LSB data bit activity on the ADCDAT pin due to system
noise but no significant digital output will be present.
The VMIDSEL and BIASEN bits must be set to enable analogue input midrail voltage and for
normal ADC operation.
ADCDAT data output delay from power up - with power supplies starting from 0V - is determined
primarily by the VMID charge time. ADC initialisation and power management bits may be set
immediately after POR is released; VMID charge time will be significantly longer and will dictate
when the device is stabilised for analogue input.
ADCDAT data output delay at power up from device standby (power supplies already applied) is
determined by ADC initialisation time, 2/fs.
midrail_on,
midrail_off
midrail_off,
is determined by the VMID pin charge time. This
, is measured using a 1μF capacitor on the
is determined by the analogue input coupling
PD, Rev 4.6, July 2009
WM8985
25

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