M1AFS-EMBEDDED-KIT Actel, M1AFS-EMBEDDED-KIT Datasheet - Page 9

• Manufacturer Part Number: M1AFS-EMBEDDED-KIT
• Description: MCU, MPU & DSP Development Tools CortexM1-enabled Fusion Embedded Kit
• Manufacturer: Actel

Specifications of M1AFS-EMBEDDED-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1 – Cortex-M1 Overview
Cortex-M1 Processor
Cortex-M1 is a general purpose 32-bit microprocessor that offers high performance and small size in
FPGAs.
Cortex-M1 runs a subset of the Thumb-2 instruction set (ARMv6-M) that includes all base 16-bit Thumb
instructions and a few Thumb-2 32-bit instructions (BL, MRS, MSR, ISB, DSB, and DMB). This enables
writing very tight and efficient processor code, which is ideal for the limited memory typically found in
deeply-embedded applications.
Figure 1-1
M1-enabled devices. The components within the blue box in this diagram are preconfigured
and fixed for each available configuration of the core. These components are contained within
a black box core data base (CDB) file which includes placement and routing information for
these components. At the top level, there is an RTL wrapper surrounding the CDB and this
contains reset synchronization logic and some debug related logic.
The main blocks in Cortex-M1 are shown in
Vectored Interrupt Controller (NVIC), the AHB interface, and the debug unit.
general purpose 32-bit registers as well as a Link register (LR), a program counter (PC), a
stack pointer (SP) and a Program Status register (xPSR). If the core has been configured with
operating system (OS) extensions present, a second stack pointer is available for use. A
dedicated memory interface is available for access to Instruction and Data Tightly Coupled
Memories (ITCM and DTCM) when the core has been configured with non-zero-sized TCMs.
Currently OS extensions and TCMs are not supported on the majority of Actel's M1 devices
but are available when usi
Figure 1-1 • Cortex-M1 Block Diagram
Debug Interface
NSYSRESET
WDOGRESn
PORESETN
Misc Debug
WDOGRES
(JTAG)
Signals
.
HCLK
shows a block diagram of the Cortex-M1 processor available for use in Actel's
Key
= Black Box
= Optional Component
UJTAG
Synch.
Reset
ng an M1AFS1500 or M1A3PE1500 device.
R ev i si o n 1 2
SYSRESETn
DBGRESETn
Preconfigured, Placed and Routed (CDB file) Black Box
Figure 1-1
Debug
CortexM1Top
Interrupts
Logic
NVIC
and include the processor core, the Nested
ITCM
External Interface
(AHB-Lite)
Bus Matrix
Core
DTCM
The processor has 13
HRESETn
9