M1AFS-EMBEDDED-KIT Actel, M1AFS-EMBEDDED-KIT Datasheet - Page 32

• Manufacturer Part Number: M1AFS-EMBEDDED-KIT
• Description: MCU, MPU & DSP Development Tools CortexM1-enabled Fusion Embedded Kit
• Manufacturer: Actel

Specifications of M1AFS-EMBEDDED-KIT

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bus Functional Model (BFM)
BFM Usage Flow
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The BFM is part of an overall system test strategy, so it is helpful to look at the context in which it is used.
Figure 6-1
Figure 6-1 • BFM Simulation Environment
In
bus fabric, IP blocks, and the memory system using SmartDesign.
Based on the bus connections made, SmartDesign can build up a memory map for the Cortex-M1
system. SmartDesign will generate the following outputs:
The BFM acts as a pin-for-pin replacement for the Cortex-M1 in the project system. It initiates cycle-
accurate bus transactions on the native Cortex-M1 bus. It has no knowledge, however, of real Cortex-M1
instructions.
At this point, the BFM may be used to run a basic test of the system, using the skeleton system
BFM script serving as stimulus for the simulation. This script does a write to and/or read from
Figure 6-1
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BoardLevelSystem
1) The simulator executes automatically a Tcl script that converts a
2) The *.vec files are automatically read by the Cortex-M1 BFM
Verilog/VHDL model of SoC subsystem
Verilog/VHDL models of IP cores
Cortex-M1 BFM
BFM test script
System-level skeleton testbench
BFM script (*.bfm) into binary instructions (*.vec files).
and executed.
shows the various components within a typical system-level testbench.
it is assumed that the processor subsystem has been specified by selecting the processor,
SRAM
Flash
ICE
Simulation Environment for a Cortex-M1 System Inside Libero IDE
FPGATopDesign
SmartDesign Subsystem
User IP
Periph1
PeriphN
R ev i sio n 1 2
UART
User Glue Logic
AMBA Bus Fabric
Cortex-M1 Timing Shell
Cortex-M1 BFM
Description
BFM High
Sequence
Stimulus
Level
with the