OM6271 NXP Semiconductors, OM6271 Datasheet - Page 5

• Manufacturer Part Number: OM6271
• Description: Interface Modules & Development Tools SPI to I2C Master Bridge Demoboard
• Manufacturer: NXP Semiconductors

Specifications of OM6271

• Interface Type: I2C, SPI
• Data Bus Width: 8 bit
• For Use With/related Products: SC18IS601IPW
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
Table 2.
[1]
SC18IS600_601_5
Product data sheet
Symbol
GPIO0
CS
RESET
V
MISO
MOSI
SDA
SCL
GPIO1
GPIO2
SCLK
V
GPIO3
CLKIN
INT
WAKEUP/IO4 15
IO5
n.c.
SS
DD
HVQFN24 package die supply ground is connected to both V
ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
Pin description
Pin
TSSOP16
SC18IS600 SC18IS601 SC18IS600
1
2
3
4
5
6
7
8
9
10
11
12
13
-
14
16
-
5.2 Pin description
1
2
3
4
5
6
7
8
9
10
11
12
-
13
14
15
16
-
HVQFN24
23
1
2
3
4
5
6
8
11
13
14
15
16
-
17
18
20
7, 9, 10, 12,
19, 21, 22,
24
[1]
Rev. 05 — 28 July 2008
Type
I/O
I
I
I
O
I
I/O
O
I/O
I/O
I
I
I/O
I
O
I/O
I/O
-
SS
pin and exposed center pad. V
Description
programmable I/O pin
Chip select. When CS is LOW, the SC18IS600/601 is
selected.
Master Reset. When active (LOW), RESET sets internal
registers to the default values, and resets the I
SPI hardware. See
ground supply voltage
SPI slave data output
SPI slave data input
I
I
programmable I/O pin
programmable I/O pin
SPI clock input
2.4 V to 3.6 V supply voltage
programmable I/O pin
external clock input
Interrupt. When active (LOW), INT informs the CPU that
the SC18IS600/601 has an interrupt to be serviced.
INT is reset (deactivated) either when the I2CStat register
is read or as a result of a master reset (RESET). This pin
is an open-drain pin.
Wake up the SC18IS600/601 from the Power-down mode.
Pulled LOW by the host to wake-up from low power state.
This pin can also be used as a quasi-bidirectional I/O
when not in a power-down state.
quasi-bidirectional I/O pin
not connected
2
2
C-bus serial data input/output
C-bus serial clock output
Table
SS
SC18IS600/601
3.
pin must be connected to supply
SPI to I
© NXP B.V. 2008. All rights reserved.
2
C-bus interface
2
C-bus and
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