S1D13743F00A200 Epson, S1D13743F00A200 Datasheet - Page 52

LCD Drivers LCD CNTRL w/Embedded 464KB SRAM

S1D13743F00A200

Manufacturer Part Number
S1D13743F00A200
Description
LCD Drivers LCD CNTRL w/Embedded 464KB SRAM
Manufacturer
Epson
Datasheet

Specifications of S1D13743F00A200

Maximum Clock Frequency
33 MHz, 68.59 MHz
Operating Supply Voltage
1.5 V
Maximum Operating Temperature
+ 85 C
Package / Case
QFP-20-144
Attached Touch Screen
No
Maximum Supply Current
74 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13743F00A200
Manufacturer:
EPSON
Quantity:
5 690
Page 52
10.3.3 Panel Configuration Registers
bit 7
bit 0
bits 6-0
bits 6-0
S1D13743
X70A-A-001-02
REG[14h] Panel Type Register
Default = 00h
REG[16h] Horizontal Display Width Register (HDISP)
Default = 01h
REG[18h] Horizontal Non-Display Period Register (HNDP)
Default = 00h
VD Data Swap
n/a
n/a
7
7
7
6
6
6
Note
Note
VD Data Swap
This bit determines whether the panel data lines (VD[23:0]) are swapped. If enabled, the
data swap is from the msb to the lsb on the active output pins as shown in Table 5-2: “LCD
Interface Data Pin Mapping for 24-bit Panels,” on page 20 and Table 5-3: “LCD Interface
Data Pin Mapping for 18-bit Panels,” on page 20.
When this bit = 0, the data lines are normal (i.e. output pin VD23 = VD23, etc.).
When this bit = 1, the data lines are swapped (i.e. output pin VD23 = VD0, etc.).
Panel Data Width
This bit specifies the data width for the LCD interface.
When this bit = 0, the LCD interface is configured as 18-bit (1 pixel / clock).
When this bit = 1, the LCD interface is configured as 24-bit (1 pixel / clock).
Horizontal Display Width bits [6:0]
These bits specify the Horizontal Display Width (HDISP) for the LCD panel, in 8 pixel
resolution.
Horizontal Non-Display Period bits [6:0]
These bits specify the Horizontal Non-Display Period (HNDP), in pixels.
The minimum Horizontal Display Width is 8 pixels (REG[16h] bits 6-0 = 01h).
The minimum Horizontal Non-Display Period is 3 Pixels (REG[18h] bits 6-0 = 03h).
HS Start + HS Width <= HNDP
HDISP in number of pixels = (REG[16h] bits 6-0) × 8
HNDP in pixels = REG[18h] bits 6-0
5
5
5
4
4
4
Horizontal Non-Display Period bits 6-0
Revision 2.7
Horizontal Display Width bits 6-0
n/a
3
3
3
2
2
2
Epson Research and Development
Hardware Functional Specification
1
1
1
Vancouver Design Center
Issue Date: 2010/05/18
Read/Write
Panel Data Width
Read/Write
Read/Write
0
0
0

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