S1D13743F00A200 Epson, S1D13743F00A200 Datasheet - Page 18

• Manufacturer Part Number: S1D13743F00A200
• Description: LCD Drivers LCD CNTRL w/Embedded 464KB SRAM
• Manufacturer: Epson

Specifications of S1D13743F00A200

• Maximum Clock Frequency: 33 MHz, 68.59 MHz
• Operating Supply Voltage: 1.5 V
• Maximum Operating Temperature: + 85 C
• Package / Case: QFP-20-144
• Attached Touch Screen: No
• Maximum Supply Current: 74 mA
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Page 18
4.3 Summary of Configuration Options
S1D13743
X70A-A-001-02
Configuration
CNF0
CNF1
CNF2
Input
Host Data Lines are normal:
If CNF1 = 1b, then D15 = D15, etc.
If CNF1 = 0b, then D7 = D7, etc.
Host Data is 16-bit (see Note)
PIOVDD output current = 6.5mA
Note
These pins are used for power-up configuration and must be connected directly to IOV
or V
The status of these pins can be read in REG[02h] using the CNF[2:0] Status bits.
When CNF1 = 0b, all register access is 8-bit only.
When CNF1 = 1b (16-bit), all register access is 8-bit ONLY (most significant byte
on the data bus is ignored) except for the Memory Data Port (REG[48h] ~
REG[49h]) which is 16-bit.
SS
1 (connected to IOV
. Changing the state of these pins is only permitted when RESET# is low (active).
Table 4-6: Summary of Power-On/Reset Options
DD
)
Revision 2.7
Power-On/Reset State
Host Data Lines are swapped:
If CNF1 = 1b, then D15 = D0, etc.
If CNF1 = 0b, then D7 = D0, etc.
Host Data is 8-bit (see Note)
PIOVDD output current = 2.5mA
0 (Connected to V
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2010/05/18
SS
)
DD