S1D13743F00A200 Epson, S1D13743F00A200 Datasheet - Page 105

LCD Drivers LCD CNTRL w/Embedded 464KB SRAM

S1D13743F00A200

Manufacturer Part Number
S1D13743F00A200
Description
LCD Drivers LCD CNTRL w/Embedded 464KB SRAM
Manufacturer
Epson
Datasheet

Specifications of S1D13743F00A200

Maximum Clock Frequency
33 MHz, 68.59 MHz
Operating Supply Voltage
1.5 V
Maximum Operating Temperature
+ 85 C
Package / Case
QFP-20-144
Attached Touch Screen
No
Maximum Supply Current
74 mA
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S1D13743F00A200
Manufacturer:
EPSON
Quantity:
5 690
Epson Research and Development
Vancouver Design Center
20 Double Buffering
20.1 Double Buffer Controller
Hardware Functional Specification
Issue Date: 2010/05/18
Vertical Non-Display Period
Input Video Frame Burst
Read Buffer Pointer
Write Buffer Pointer
Switch buffer pointers
since a frame completed
being updated in the last
LCD frame period
Double buffering is provided to prevent tearing of streaming video data. All static (non-
video) image data will always be written to the upper half (Buffer 1) of the frame buffer.
When video is being input, the first frame will be written to the lower half (Buffer 2) of the
double buffer. The second frame will be written to Buffer 1. While video data is being
input, the static part of the image going to the LCD will still always come from Buffer 1.
The source of the video window will come from either Buffer 1 or Buffer 2, depending on
which one was the last to be completely updated.
The switching of the buffer read/write pointers can only occur once per frame, at the
beginning of the vertical non-display period. The pointers will only switch if: a video frame
had completed being updated within the last output frame period, and no new video frame
is currently being written. Because of this, each time the user finishes writing a frame of
video data, they should wait until the next vertical non-display period before writing the
next frame. This can be accomplished by using the TE pin or by polling the Vertical Display
Period Status (REG[58h] bit 7). Alternatively, if the user can guarantee that the maximum
input video frame rate is 1/2 the LCD frame rate and that the burst length for writing a video
frame is less than one LCD frame period, then no checking for the vertical non-display
period is required. If attention is not paid to allowing the pointers to switch, then frames
may be dropped.
To use the double buffer feature:
• Set appropriate bits in the Special Effects Register, REG[36h] bits 7-6 to 11b.
• Setup the Window Position Registers, REG[38h] ~ REG[46h].
• Write the video data to the Memory Data Port, REG[48h] ~ REG[49h].
Figure 20-1: Switching of Buffer Pointers
written.
Don’t switch buffer pointers
since a frame is currently being
Revision 2.7
Switch buffer pointers
since a frame completed
being updated in the last
LCD frame period
Switch buffer pointers
since a frame completed
being updated in the last
LCD frame period
X70A-A-001-02
S1D13743
Page 105

Related parts for S1D13743F00A200