XRT94L31IB Exar Corporation, XRT94L31IB Datasheet - Page 7

• Manufacturer Part Number: XRT94L31IB
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
AG22
PIN #
AB24
AE18
AF21
AF20
T3
T2
DIRECT_ADD_SEL
SIGNAL NAME
RXLDAT_P
RXLDAT_N
PBLAST_L
PDBEN_L
RESET_L
PINT_L
I/O
O
I
I
I
I
I
I
SONET/SDH SERIAL LINE INTERFACE PINS
TTL
TTL
CMOS
TTL
TTL
LVPEC
L
LVPEC
L
TYPE
Bi-directional Data Bus Enable Input pin:
This input pin is used to either enable or tri-state the Bi-Directional Data
Bus pins (D[7:0]), as described below.
Setting this input pin "Low" enables the Bi-directional Data bus.
Setting this input "High" tri-states the Bi-directional Data Bus.
Last Burst Transfer Indicator input pin:
If the Microprocessor Interface is operating in the Intel-I960 Mode, then
this input pin is used to indicate (to the Microprocessor Interface block)
that the current data transfer is the last data transfer within the current
burst operation.
The Microprocessor should assert this input pin (by toggling it "Low") in
order to denote that the current READ or WRITE operation (within a
BURST operation) is the last operation of this BURST operation.
N
Interrupt Request Output:
This open-drain, active-low output signal will be asserted when the Map-
per/Framer device is requesting interrupt service from the Microproces-
sor. This output pin should typically be connected to the Interrupt
Request input of the Microprocessor.
Reset Input:
When this active-low signal is asserted, the XRT94L31 will be asynchro-
nously reset. When this occurs, all outputs will be tri-stated and all on-
chip registers will be reset to their default values.
Address Location Select input pin:
This input pin must be pulled "High" in order to permit normal operation
of the Microprocessor Interface.
Receive STS-3/STM-1 Data - Positive Polarity PECL Input:
This input pin, along with RXLDAT_N functions as the Recovered Data
Input, from the Optical Transceiver or as the Receive Data Input from the
system back-plane
N
Receive STS-3/STM-1 Data - Negative Polarity PECL Input:
This input pin, along with RXLDAT_P functions as the Recovered Data
Input, from the Optical Transceiver or as the Receive Data Input from the
system back-plane.
N
OTE
OTE
OTE
: Connect this input pin to GND whenever the Microprocessor
: For APS (Automatic Protection Switching) purposes, this input
: For APS (Automatic Protection Switching) purposes, this input
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
Interface has been configured to operate in the Intel-Async,
Motorola 68K and IBM PowerPC 403 modes.
pin, along with RXLDAT_N functions as the Primary STS-3/
STM-1 Receive Data Input Port.
pin, along with RXLDAT_P functions as the Primary Receive
STS-3/STM-1 Data Input Port
7
DESCRIPTION
XRT94L31