XRT94L31IB Exar Corporation, XRT94L31IB Datasheet - Page 27

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XRT94L31IB

Manufacturer Part Number
XRT94L31IB
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Datasheet

Specifications of XRT94L31IB

Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant

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REV. 1.0.1
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
C10
D10
C11
B10
E11
A5
A6
A7
C9
A8
B7
B9
TxPOHEnable_0
TxPOHEnable_1
TxPOHEnable_2
TxPOHFrame_0
TxPOHFrame_1
TxPOHFrame_2
SIGNAL NAME
TxPOHClk_0
TxPOHClk_1
TxPOHClk_2
TxPOHIns_0
TxPOHIns_1
TxPOHIns_2
I/O
TRANSMIT LINE/ SYSTEM SIDE INTERFACE PINS
O
O
O
I
CMOS
CMOS
TTL
CMOS
TYPE
Transmit Path Overhead Input Port - Clock Output pin:
These output pins, along with TxPOH_n, TxPOHEnable_n, TxPOHIns_n
and TxPOHFrame function as the Transmit Path Overhead (TxPOH)
Input Port.
The TxPOHFrame and TxPOHEnable output pins are updated upon the
falling edge this clock output signal. The TxPOHIns_n input pins and the
data residing on the TxPOH_n input pins are sampled upon the next fall-
ing edge of this clock signal.
Transmit Path Overhead Input Port - Frame Output pin:
These output pins, along with the TxPOH_n, TxPOHEnable_n,
TxPOHIns_n and TxPOHClk_n function as the Transmit Path Overhead
Input Port.The function of these output pins depends upon whether or
not the user inserting POH or TOH data via the TxPOH_n input pins.If
the user is only inserting POH data via these input pins:The TxPOH port
will pulse these output pins "High" whenever it is ready to accept and
process the J1 byte (e.g., the very first POH byte) via this port.
N
Transmit Path Overhead Input Port - Insert Enable Input pin:
These input pins, along with TxPOH_n, TxPOHEnable_n,
TxPOHFrame_n and TxPOHClk_n function as the Transmit Path Over-
head (TxPOH) Input Port.
These input pins are used to enable or disable the TxPOH input port. If
these input pins are pulled "High", then the TxPOH port will sample and
latch data via the corresponding TxPOH input pins, upon the falling edge
of TxPOHClk_n.
Conversely, if these input pins are pulled "Low", then the TxPOH port will
NOT sample and latch data via the corresponding TxPOH input
pins.Note:
N
Transmit Path Overhead Input Port - POH Indicator Output pin:
These output pins, along with TxPOH_n, TxPOHIns_n, TxPOHFrame_n
and TxPOHClk_n function as the Transmit Path Overhead (TxPOH)
Input Port.
These output pins will pulse "High" anytime the TxPOH port is ready to
accept and process POH bytes. These output pins will be "Low" at all
other times.
OTES
OTE
1. The externally circuitry can determine whether or not the
2. If the TxPOHEnable_n output pin is "High" while the
: If the TxPOHIns_n input pin is pulled "Low", this setting will be
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
:
overridden if the user has configured the Transmit SONET/STS-
1 POH Processor or Transmit STS-1 TOH Processor blocks to
accept certain POH or TOH overhead bytes via the external
port.
TxPOH port is expecting the A1 byte or the J1 byte, by
checking the state of the corresponding TxPOHEnable output
pin.
TxPOHFrame_n output pin is "High", then the TxPOH port is
ready to process the A1 (TOH) bytes.
TxPOHFrame_n output pin is "High", then the TxPOH port is
ready to process the J1 (POH) bytes.
27
If the TxPOHEnable_n output pin is "Low" while the
DESCRIPTION
XRT94L31

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