XRT94L31IB Exar Corporation, XRT94L31IB Datasheet - Page 114

• Manufacturer Part Number: XRT94L31IB
• Description: IC MAPPER DS3/E3/STS-1 504TBGA
• Manufacturer: Exar Corporation

Specifications of XRT94L31IB

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 3.14 V ~ 3.47 V
• Package / Case: 504-LBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Contains lead / RoHS Compliant

XRT94L31
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
Table 18
Egress Direction) for STS-1/STM-0 Applications and when the Transmit STS-1 TOH Processor block has been
configured to output the DS3/E3/STS_1_DATA_OUT signal upon the falling edge of DS3/E3/
STS_1_CLOCK_OUT.
STS-1/STM-0 Telecom Bus Interface Timing Information
This section presents the timing requirements for the STS-1/STM-0 Telecom Bus Interface. In particular this
section indicates the following.
a. Identifies which edge of RxD_CLK in which the RxD_D[7:0], RxD_PL, RxD_C1J1, RxD_ALARM and
b. The clock to output delays (from the rising edge of RxD_CLK to the instant that the RxD_D[7:0], RxD_PL,
c. Identifies which edge of TxA_CLK that the TxA_D[7:0], TxA_PL, TxA_C1J1 and TxA_DP input pins are
d. The set-up time requirements (from an update in the TxA_D[7:0], TxA_PL, TxA_C1J1, TxA_ALARM and
e. The hold-time requirements (from the rising edge of TxA_CLK to a change in the TxA_D[7:0], TxA_PL,
In the Receive STS-1/STM-0 Telecom Bus Interface, all of the signals (which are output via this Bus Interface)
are updated upon the rising edge of RxD_CLK (6.48MHz clock signal).
1.4
1.
2.
1.3.9
1.4.1
1.4.2
S
S
YMBOL
YMBOL
t11
t11
RxD_DP output pins are updated on.
RxD_C1J1, RxD_ALARM and RxD_DP output pins are updated.
sampled on.
TxA_DP input signals to the rising edge of TxA_CLK).
TxA_C1J1, TxA_ALARM and TxA_DP input signals)
In contrast to the names that are given to the Transmit and Receive STS-3/STM-1 Telecom Bus
Interface, the Transmit STS-1/STM-0 Telecom Bus interface will have the responsibility of receiving (in
lieu of transmitting) STS-1/STM-0 data from some remote entity over a Telecom Bus Interface that is
clocked at 6.48MHz.
responsibility of transmitting (in lieu of receiving) STS-1/STM-0 data to some remote entity over a
Telecom Bus Interface that is also clocked at 6.48MHz.
The STS-1/STM-0 Telecom Bus Interface, associated with Channel 0 can be configured to operate as
either an STS-1/STM-0 or an STS-3/STM-1 Telecom Bus Interface. Timing Information for either of
these modes will be presented in this section.
T
T
ABLE
ABLE
STS-1/STM-0 TELECOM BUS INTERFACE TIMING INFORMATION
presents information on the Timing parameters for the DS3/E3/STS-1 LIU Interface Signals (in the
SOME NOTES ABOUT THE STS-1/STM-0 TELECOM BUS INTERFACE
Rising edge of DS3/E3/STS_1_CLK_OUT to DS3/E3/STS_1_DATA_OUT
output delay
Egress Timing for STS-1/STM-0 Applications (Continued)
Rising edge of DS3/E3/STS_1_CLK_OUT to DS3/E3/STS_1_DATA_OUT
output delay
The Receive STS-1/STM-0 Telecom Bus Interface Timing
17: T
18: T
A
A
PPLICATIONS
IMING
IMING
PPLICATIONS
I
I
NFORMATION FOR THE
NFORMATION FOR THE
A
Likewise, the Receive STS-1/STM-0 Telecom Bus Interface will have the
A
PPLICATIONS
PPLICATIONS
D
D
ESCRIPTION
ESCRIPTION
(
(
FALLING EDGE OF
RISING EDGE OF
E
E
GRESS
GRESS
114
DS3/E3/STS-1 LIU I
DS3/E3/STS-1 LIU I
DS3/E3/STS_1_CLOCK_OUT)
DS3/E3/STS_1_CLOCK_OUT)
NTERFACE FOR
NTERFACE FOR
M
M
0ns
0ns
IN
IN
.
.
STS-1/STM-0
STS-1/STM-0
T
T
YP
YP
.
.
REV. 1.0.1
4.5ns
3.3ns
M
M
AX
AX
.
.