PIC18F87J72-I/PT Microchip Technology, PIC18F87J72-I/PT Datasheet - Page 466

• Manufacturer Part Number: PIC18F87J72-I/PT
• Description: IC PIC MCU 8BIT 14KB FLSH 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J72-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART, SPI, I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14
• Controller Family/series: PIC18F
• No. Of I/o's: 51
• Ram Memory Size: 3923Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F87J72 FAMILY
BN ..................................................................................... 343
BNC................................................................................... 344
BNN................................................................................... 344
BNOV ................................................................................ 345
BNZ ................................................................................... 345
BOR. See Brown-out Reset.
BOV................................................................................... 348
BRA................................................................................... 346
Break Character (12-Bit) Transmit and Receive ............... 253
BRG. See Baud Rate Generator.
DS39979A-page 466
Baud Rate Generator ................................................ 225
Capture Mode Operation .......................................... 160
Comparator Analog Input Model ............................... 297
Comparator I/O Operating Modes............................. 294
Comparator Output ................................................... 296
Comparator Voltage Reference ................................ 300
Comparator Voltage Reference Output
Compare Mode Operation ........................................ 161
Connections for On-Chip Voltage Regulator............. 327
CTMU........................................................................ 303
CTMU Current Source Calibration Circuit ................. 306
CTMU Typical Connections and Internal
CTMU Typical Connections and Internal
Delta-Sigma ADC (Simplified)................................... 444
Device Clock ............................................................... 25
Dual-Channel AFE .................................................... 435
EUSART Receive ..................................................... 250
EUSART Transmit .................................................... 248
External Power-on Reset Circuit
Fail-Safe Clock Monitor (FSCM) ............................... 329
Generic I/O Port Operation ....................................... 105
Interrupt Logic ............................................................. 90
LCD Clock Generation .............................................. 172
LCD Driver Module ................................................... 167
LCD Regulator Connections (M0 and M1) ................ 174
MSSP (I
MSSP (I
MSSP (SPI Mode)..................................................... 195
On-Chip Reset Circuit ................................................. 43
PIC18F8XJ72.............................................................. 12
PLL.............................................................................. 30
PWM Operation (Simplified) ..................................... 163
Reads From Flash Program Memory.......................... 81
Resistor Ladder Connections for
Resistor Ladder Connections for
RTCC ........................................................................ 139
Single Comparator .................................................... 295
SPI Master/Slave Connection ................................... 199
Table Read Operation................................................. 77
Table Write Operation ................................................. 78
Table Writes to Flash Program Memory ..................... 83
Timer0 in 16-Bit Mode............................................... 124
Timer0 in 8-Bit Mode................................................. 124
Timer1 (16-Bit Read/Write Mode) ............................. 128
Timer1 (8-Bit Mode) .................................................. 128
Timer2 ....................................................................... 134
Timer3 (16-Bit Read/Write Mode) ............................. 136
Timer3 (8-Bit Mode) .................................................. 136
Watchdog Timer........................................................ 325
Buffer Example ................................................. 301
Configuration for Pulse Delay Generation ........ 314
Configuration for Time Measurement ............... 313
(Slow V
M2 Configuration............................................... 175
M3 Configuration............................................... 176
2
2
C Master Mode) ......................................... 223
C Mode) ..................................................... 204
DD
Power-up).......................................... 45
Preliminary
BRGH Bit
Brown-out Reset (BOR)...................................................... 45
BSF................................................................................... 346
BTFSC .............................................................................. 347
BTFSS .............................................................................. 347
BTG .................................................................................. 348
BZ ..................................................................................... 349
C
C Compilers
CALL................................................................................. 349
CALLW ............................................................................. 378
Capture (CCP Module) ..................................................... 160
Capture/Compare/PWM (CCP) ........................................ 157
Charge Time Measurement Unit (CTMU)......................... 303
CLKIA ................................................................................. 20
Clock Sources..................................................................... 27
CLRF ................................................................................ 350
CLRWDT .......................................................................... 350
Code Examples
TXSTA1 Register...................................................... 243
TXSTA2 Register...................................................... 262
and On-Chip Voltage Regulator................................ 328
Detecting .................................................................... 45
MPLAB C18 .............................................................. 386
Associated Registers ................................................ 162
CCP Pin Configuration.............................................. 160
CCPR2H:CCPR2L Registers.................................... 160
Software Interrupt ..................................................... 160
Timer1/Timer3 Mode Selection................................. 160
Capture Mode. See Capture.
CCP Mode and Timer Resources............................. 158
CCPRxH Register..................................................... 158
CCPRxL Register ..................................................... 158
Compare Mode. See Compare.
Configuration ............................................................ 158
Interaction of CCP1 and CCP2 for
Interconnect Configurations...................................... 158
Associated Registers ................................................ 317
Calibrating the Module.............................................. 305
Creating a Delay ....................................................... 314
Effects of a Reset ..................................................... 314
Measuring Capacitance with the CTMU ................... 311
Measuring Time ........................................................ 313
Module Initialization .................................................. 305
Operation .................................................................. 304
Default System Clock on Reset .................................. 28
Selection Using OSCCON Register............................ 28
16 x 16 Signed Multiply Routine ................................. 88
16 x 16 Unsigned Multiply Routine ............................. 88
8 x 8 Signed Multiply Routine ..................................... 87
8 x 8 Unsigned Multiply Routine ................................. 87
AFE Clock Source and Interrupt Configuration......... 290
Capacitance Calibration Routine .............................. 310
Changing Between Capture Prescalers.................... 160
Computed GOTO Using an Offset Value.................... 59
Current Calibration Routine ...................................... 308
Erasing a Flash Program Memory Row...................... 82
Fast Register Stack .................................................... 59
How to Clear RAM (Bank 1) Using Indirect Addressing .
Timer Resources .............................................. 159
During Sleep and Idle Modes ........................... 314
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