MFRC52301HN1,157 NXP Semiconductors, MFRC52301HN1,157 Datasheet - Page 59
MFRC52301HN1,157
Manufacturer Part Number
MFRC52301HN1,157
Description
IC READER 13.56MHZ 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.MFRC52301HN1151.pdf
(97 pages)
Specifications of MFRC52301HN1,157
Frequency
13.56MHz
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Rf Type
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935282956157
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NXP Semiconductors
MFRC523_34
Product data sheet
PUBLIC
9.2.3.12 TCounterValReg register
9.2.3.11 TReloadReg register
Table 107. TPrescalerReg register bit descriptions
Defines the 16-bit timer reload value.
Remark: The reload value bits are contained in two 8-bit registers.
Table 108. TReloadReg (higher bits) register (address 2Ch); reset value: 00h bit allocation
Table 109. TReloadReg register higher bit descriptions
Table 110. TReloadReg (lower bits) register (address 2Dh); reset value: 00h bit allocation
Table 111. TReloadReg register lower bit descriptions
Contains the timer value.
Remark: The timer value bits are contained in two 8-bit registers.
Table 112. TCounterValReg (higher bits) register (address 2Eh); reset value: xxh bit
Bit
7 to 0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Bit
7 to 0
Bit
Symbol
Access
Symbol
TPrescaler_Lo[7:0] defines the lower 8 bits of the TPrescaler value
Symbol
TReloadVal_Hi[7:0]
Symbol
TReloadVal_Lo[7:0] defines the lower 8 bits of the 16-bit timer reload value. On a
allocation
7
7
7
All information provided in this document is subject to legal disclaimers.
Rev. 3.5 — 24 September 2010
6
6
6
Description
the following formula is used to calculate f
Demot Reg is set to logic 0:
f
where TPreScaler = [TPrescaler_Hi:TPrescaler_Lo] (TPrescaler
value on 12 bits). The default TPrescalEven is logic 0;
f
unit”
Timer
Timer
115235
Description
start event, the timer loads the timer reload value. Changing this
register affects the timer only at the next start event
Description
defines the higher 8 bits of the 16-bit timer reload value. On a
start event, the timer loads the timer reload value. Changing
this register affects the timer only at the next start event
= 13.56 MHz / (2 * TPreScaler + 2); see
= 13.56 MHz / (2 * TPreScaler + 1)
5
5
5
TCounterVal_Hi[7:0]
TReloadVal_Lo[7:0]
TReloadVal_Hi[7:0]
4
4
4
R/W
R/W
R
3
3
3
2
2
2
Timer
Contactless reader IC
MFRC523
Section 8.7 “Timer
if TPrescalEven bit in
© NXP B.V. 2010. All rights reserved.
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