T48C862M-R4-TNQ Atmel, T48C862M-R4-TNQ Datasheet - Page 77

• Manufacturer Part Number: T48C862M-R4-TNQ
• Description: IC MON TIRE PRESS 433MHZ 24-SOIC
• Manufacturer: Atmel

Specifications of T48C862M-R4-TNQ

• Frequency: 433MHz
• Modulation Or Protocol: FM, FSK
• Data Rate - Maximum: 32 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 9.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1KB EEPROM, 1KB RAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Applications: -

Serial Interface Status and
Control Register (SISC)
Serial Transmit Buffer (STB) –
Byte Write
4551C–4BMCU–01/04
T
ter and star
he STB is the transmit buffer of the SSI. The SSI transfers the transmit buffer into the shift regi
Write
Read
MCL
RACK
TACK
SIM
IFN
SRDY
ACT
First write cycle
Second write cycle
ts shifting with
M ulti- C hip L ink activation
MCL = 1,multi-chip link disabled. This bit has to be set to "0" during
MCL = 0, connects SC and SD additionally to the internal multi-chip link pads
R eceive ACK nowledge status/control bit for MCL mode
RACK = 0, transmit acknowledge in next receive telegram
RACK = 1, transmit no acknowledge in last receive telegram
T ransmit ACK nowledge status/control bit for MCL mode
TACK = 0, acknowledge received in last transmit telegram
TACK = 1, no acknowledge received in last transmit telegram
S erial I nterrupt M ask
SIM = 1, disable interrupts
SIM = 0, enable serial interrupt. An interrupt is generated.
I nterrupt F u N ction
IFN = 1, the serial interrupt is generated at the end of telegram
IFN = 0, the serial interrupt is generated when the SRDY goes low (i.e., buffer
S erial interface buffer R ea DY status flag
SRDY = 1,
SRDY = 0,
Transmission ACT ive status flag
ACT = 1, transmission is active, i.e., serial data transfer. Stop or start conditions
ACT = 0, transmission is inactive
Bit 3
MCL
–
transactions to/from the internal EEPROM
becomes empty/full in transmit/receive mode)
are currently in progress.
Bit 3
Bit 7
the
in receive mode: receive buffer empty
in transmit mode: transmit buffer full
in receive mode: receive buffer full
in transmit mode: transmit buffer empty
Bit 2
RACK
most significant bit.
TACK
Bit 2
Bit 6
T48C862-R4 [Preliminary]
Bit 1
ACT
SIM
Bit 1
Bit 5
Bit 0
Bit 0
Bit 4
SRDY
IFN
Primary register address: "A"hex
Primary register address: "9"hex
Reset value: xxxxb
Reset value: xxxxb
Reset value: 1111b
Reset value: xxxxb
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