T48C862M-R4-TNQ Atmel, T48C862M-R4-TNQ Datasheet - Page 60

• Manufacturer Part Number: T48C862M-R4-TNQ
• Description: IC MON TIRE PRESS 433MHZ 24-SOIC
• Manufacturer: Atmel

Specifications of T48C862M-R4-TNQ

• Frequency: 433MHz
• Modulation Or Protocol: FM, FSK
• Data Rate - Maximum: 32 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 9.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1KB EEPROM, 1KB RAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Applications: -

Timer 3 – Mode 10:
Manchester
Demodulation/Pulse-width
Demodulation
Timer 3 – Mode 11:
Biphase Demodulation
60
T48C862-R4 [Preliminary]
For Manchester demodulation, the edge detection stage must be programmed to detect
each edge at the input. These edges are evaluated by the demodulator stage. The timer
stage is used to generate the shift clock for the SSI. The compare register 1 match
event defines the correct moment for shifting the state from the input T3I as the decoded
bit into shift register - after that the demodulator waits for the next edge to synchronize
the timer by a reset for the next bit. The compare register 2 can also be used to detect a
time-out error and handle it with an interrupt routine (see “Combination Mode 8:
Manchester Demodulation/Pulse-width Demodulation” on page 83).
Figure 59. Manchester Demodulation
In the Biphase demodulation mode, the timer operates like in Manchester demodulation
mode. The difference is that the bits are decoded via a toggle flip-flop. This flip-flop sam-
ples the edge in the middle of the bitframe and the compare register 1 match event
shifts the toggle flip-flop output into shift register (see “Combination Mode 9: Biphase
Demodulation” on page 84).
Figure 60. Biphase Demodulation
CM31=SCI
CM31=SCI
SR-DATA
SR-DATA
Counter 3
Timer 3
Timer 3
Q1=SI
mode
mode
T3EX
T3EX
Reset
T3I
T3I
SI
Synchronize
Synchronize
1
0
0
0
BIT 0
BIT 0
1
1
0
1
BIT 1
BIT 1
1
1
1
1
Manchester demodulation mode
Biphase demodulation mode
BIT 2
BIT 2
1
1
1
0
0
BIT 3
BIT 3
0
0
1
0
BIT 4
BIT 4
0
1
0
BIT 5
BIT 5
1
1
0
1
4551C–4BMCU–01/04
BIT 6
BIT 6
1
1
1
0
0
0
0