T48C862M-R4-TNQ Atmel, T48C862M-R4-TNQ Datasheet - Page 63

• Manufacturer Part Number: T48C862M-R4-TNQ
• Description: IC MON TIRE PRESS 433MHZ 24-SOIC
• Manufacturer: Atmel

Specifications of T48C862M-R4-TNQ

• Frequency: 433MHz
• Modulation Or Protocol: FM, FSK
• Data Rate - Maximum: 32 kBaud
• Power - Output: 10dBm
• Current - Transmitting: 9.5mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1KB EEPROM, 1KB RAM
• Voltage - Supply: 2 V ~ 4 V
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 24-SOIC (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Applications: -

Timer 3 Control Register 1
(T3C) Write
Timer 3 Status Register 1
(T3ST) Read
4551C–4BMCU–01/04
Note:
T3EIM
T3TOP
T3TS
T3R
T3ED
T3C2
T3C1
Write
Read
The status bits T3C1, T3C2 and T3ED will be reset after a READ access to T3ST.
T imer 3 E dge I nterrupt M ask
T3EIM = 0, disables the interrupt when an edge event for Timer 3 occurs (T3I)
T3EIM = 1, enables the interrupt when an edge event for Timer 3 occurs (T3I)
T imer 3 T oggle O utput P reset T3TOP = 0, sets toggle output (M3) to "0"
T imer 3 T oggle with S tart T3TS = 0, Timer 3 output is not toggled during the start
T imer 3 R un
T imer 3 E dge D etect
This bit will be set by the edge-detect logic of Timer 3 input (T3I)
T imer 3 C ompare 2
This bit will be set when a match occurs between Counter 3 and T3CO2
T imer 3 C ompare 1
This bit will be set when a match occurs between Counter 3 and T3CO1
T3EIM
Bit 3
Bit 3
–
T3TOP
T3ED
Bit 2
Bit 2
T48C862-R4 [Preliminary]
T3TS = 1, Timer 3 output is toggled if started with T3R
T3R = 0, Timer 3 stop and reset
T3R = 1, Timer 3 run
T3TS
T3C2
T3TOP = 1, sets toggle output (M3) to "1"
Note: If T3R = 1, no output preset is possible
Bit 1
Bit 1
Primary register address: "C"hex - Write
Primary register address: "C"hex - Read
T3C1
Bit 0
Bit 0
T3R
Reset value: 0000b
Reset value: x000b
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