TWR-56F8257 Freescale Semiconductor, TWR-56F8257 Datasheet - Page 33

• Manufacturer Part Number: TWR-56F8257
• Description: TOWER SYSTEM KIT MC56F8257
• Manufacturer: Freescale Semiconductor
• Type: DSC, Digital Signal Controllerr

Specifications of TWR-56F8257

• Contents: Board, Cables, Documentation, DVD
• For Use With/related Products: Freescale Tower System, MC56F8257
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.4
The location of the vector table is determined by the vector base address register (VBA). The value in this register is used as
the upper 14 bits of the interrupt vector VAB[20:0]. The lower seven bits are determined based on the highest priority interrupt
and are then appended to VBA before presenting the full VAB to the core. Refer to the device’s reference manual for details.
The reset startup addresses of 56F824x and 56F825x are different.
Freescale Semiconductor
•
The 56F825x’s startup address is located at 0x00 0000. The reset value of VBA is reset to a value of 0x0000 that
corresponds to the address 0x00 0000.
0x00 8C00
0x00 2000
0x00 8000
0x00 0000
Interrupt Vector Table and Reset Vector
1
2
All addresses are 16-bit word addresses.
This RAM is shared with program space starting at P: 0x00 8000. See
Begin/End Address
Reserved
Reserved
Program
X:0xFF FFFF
X:0xFF FEFF
X:0xFF FF00
X:0x00 FFFF
X:0x00 EFFF
X:0x00 8BFF
X:0x00 0BFF
X:0x00 8C00
X:0x00 7FFF
X:0x00 0C00
X:0x01 0000
X:0x00 F000
X:0x00 8000
X:0x00 0000
Flash
RAM
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Figure 8. 56F8245/46 Dual Port RAM Map
Table 11. 56F8245/56 Data Memory Map
EOnCE
256 locations allocated
RESERVED
On-Chip Peripherals
4096 locations allocated
RESERVED
On-Chip Data RAM Alias
RESERVED
On-Chip Data RAM
6 KB
Dual Port RAM
2
Memory Allocation
1
Peripherals
RAM Alias
Reserved
Reserved
Reserved
EOnCE
Data
RAM
Figure
8.
0xFF FF00
0x00 F000
0x01 0000
0x00 8C00
0x00 0C00
0x00 8000
0x00 0000
Memory Maps
33