STEVAL-PCC012V1 STMicroelectronics, STEVAL-PCC012V1 Datasheet - Page 53

BOARD DEM CONN GATEWAY STM32F107

STEVAL-PCC012V1

Manufacturer Part Number
STEVAL-PCC012V1
Description
BOARD DEM CONN GATEWAY STM32F107
Manufacturer
STMicroelectronics
Series
STM32r
Type
Other Power Managementr
Datasheets

Specifications of STEVAL-PCC012V1

Main Purpose
Interface, Connectivity
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
STM32F107
Primary Attributes
Ethernet and 4 Digital/Analog Connectors
Secondary Attributes
On-Board LEDs and Joystick
Interface Type
Ethernet, USB, I2C, SPI, UART
Operating Supply Voltage
3.3 V
Product
Power Management Development Tools
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
STM32F107xx
Other names
497-10757

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STEVAL-PCC012V1
Manufacturer:
STMicroelectronics
Quantity:
1
STM32F105xx, STM32F107xx
Table 32.
5.3.11
Table 33.
1. Based on characterization results, not tested in production.
Table 34.
Symbol
V
V
Symbol
Symbol
S
ESD(HBM)
ESD(CDM)
EMI
LU
Parameter
Electromagnetic Interference (EMI)
The electromagnetic field emitted by the device are monitored while a simple application is
executed (toggling 2 LEDs through the I/O ports). This emission test is compliant with SAE
IEC61967-2 standard which specifies the test board and the pin loading.
EMI characteristics
Absolute maximum ratings (electrical sensitivity)
Based on three different tests (ESD, LU) using specific measurement methods, the device is
stressed in order to determine its performance in terms of electrical sensitivity.
Electrostatic discharge (ESD)
Electrostatic discharges (a positive then a negative pulse separated by 1 second) are
applied to the pins of each sample according to each pin combination. The sample size
depends on the number of supply pins in the device (3 parts × (n+1) supply pins). This test
conforms to the JESD22-A114/C101 standard.
ESD absolute maximum ratings
Static latch-up
Two complementary static tests are required on six parts to assess the latch-up
performance:
These tests are compliant with EIA/JESD 78A IC latch-up standard.
Electrical sensitivities
Peak level
Static latch-up class
Electrostatic discharge voltage
(human body model)
Electrostatic discharge voltage
(charge device model)
A supply overvoltage is applied to each power supply pin
A current injection is applied to each input, output and configurable I/O pin
Parameter
Ratings
V
LQFP100 package
compliant with IEC61967-2
DD
3.3 V, T
Conditions
A
25 °C,
T
A
+105 °C conforming to JESD78A
Doc ID 15274 Rev 5
T
JESD22-A114
T
JESD22-C101
A
A
+25 °C conforming to
+25 °C conforming to
Conditions
130 MHz to 1GHz
frequency band
SAE EMI Level
30 to 130 MHz
0.1 to 30 MHz
Monitored
Conditions
2
II
Class Maximum value
8/48 MHz
Max vs. [f
26
25
9
4
Electrical characteristics
HSE
2000
8/72 MHz
500
/f
HCLK
13
31
9
4
II level A
]
Class
(1)
dBµV
Unit
53/101
Unit
-
V

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