XR88C681CP/40-F Exar Corporation, XR88C681CP/40-F Datasheet - Page 17

no-image

XR88C681CP/40-F

Manufacturer Part Number
XR88C681CP/40-F
Description
IC UART CMOS DUAL 40PDIP
Manufacturer
Exar Corporation
Type
CMOS Dual Channel UARTr
Datasheet

Specifications of XR88C681CP/40-F

Number Of Channels
2, DUART
Package / Case
40-DIP (0.600", 15.24mm)
Features
*
Fifo's
1 Byte, 3 Byte
Voltage - Supply
5V
With Parallel Port
Yes
With Cmos
Yes
Mounting Type
Through Hole
Data Rate
1 Mbps
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Supply Current
15 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Operating Supply Voltage
5 V
Propagation Delay Time Ns
400 ns
No. Of Channels
2
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
DIP
No. Of Pins
40
Filter Terminals
DIP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1328-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR88C681CP/40-F
Manufacturer:
Linear
Quantity:
185
Rev. 2.11
Bit 7
0
0
0
0
1
1
1
1
Table 3. Miscellaneous Commands, Upper Nibble of all Command Registers,
Bit 6
1
1
1
1
0
0
0
0
Unless Otherwise Specified (Cont’d)
Bit 5
0
0
1
1
0
0
1
1
Bit 4
17
0
1
0
1
0
1
0
1
Description
Reset Error Status. Clears the Received Break
(RB), Parity Error (PE), Framing Error (FE) and
Overrun Error (OE) status bits, SR[7:3].
Specifically, if the Error Mode, for a particular chan-
nel is set at “Block” Error Mode, this command will
reset all of the Receiver Error Indicators in the Status
Register. In the Block Error Mode, once either a PE,
FE, OE, or RB occurs, the error will continue to be
flagged in the Status Register, until this command is
issued.
If the Error Mode, for a particular channel is set to
“Character Error Mode”, then the contents of the
Status Register for PE, FE, and RB are reflected on
a character by character basis. In the “Character
Error Mode”, the state of these indicators is based
only upon the character that is at the top of the RHR.
The OE indicator is always presented as a “Block
Error Mode” indicator, and requires this command to
be reset.
Reset Break Change Interrupt. Clears the chan-
nel’s break change interrupt status bit.
Start Break. Forces the TXDn output low. The
transmitter must be enabled to start a break. If the
transmitter is empty, the start of the break may be
delayed up to two bit times. If the transmitter is ac-
tive, the break begins when the transmission of
those characters in the THR is completed, viz.,
TXEMP must be true before the break will begin.
Stop Break. The TXDn line will go high within two
bit times. TXDn will remain high for one bit time be-
fore the next character, if any, is transmitted.
Set Rx BRG Select Extend Bit. Sets the channel’s
“Receiver BRG Select Extend Bit” to 1.
Clear Rx BRG Select Extend Bit. Clears the chan-
nel’s “Receiver BRG Select Extend Bit” to 0.
Set Tx BRG Select Extend Bit. Sets the channel’s
“Transmitter BRG Select Extend Bit” to 1.
Clear Tx BRG Select Extend Bit. Clears the chan-
nel’s “Transmitter BRG Select Extend Bit” to 0.
XR88C681

Related parts for XR88C681CP/40-F