MCF5272CVM66 Freescale Semiconductor, MCF5272CVM66 Datasheet - Page 234

• Manufacturer Part Number: MCF5272CVM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272CVM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 196-MAPBGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Ethernet Module
11.5.6
The TDAR register,
the transmit descriptor ring has been updated, that is, transmit buffers have been defined by the driver with
the ready bit set in the buffer descriptor.
The X_DES_ACTIVE bit is set whenever the register is written. This is independent of the data actually
written by the user. When TDAR is set, the FEC polls the transmit descriptor ring and processes transmit
frames (provided ETHER_EN is also set). As soon as the FEC polls a transmit descriptor whose ready bit
is not set, it clears the X_DES_ACTIVE bit and stops polling the transmit descriptor ring.
The TDAR register is cleared at reset and when ETHER_EN is cleared.
register.
Table 11-12
11-16
31–25
23–0
Bits
24
Reset
Reset
Field
Field
Addr
R/W
R/W
X_DES_ACTIVE
Transmit Descriptor Active Register (TDAR)
describes the TDAR fields.
31
15
Name
—
—
Figure
MCF5272 ColdFire
Figure 11-10. Transmit Descriptor Active Register (TDAR)
11-10, is a command register which should be set by the user to indicate that
—
Reserved, should be cleared.
Set to one when this register is written, regardless of the value written. Cleared by the FEC
whenever no additional ready descriptors remain in the transmit ring.
Reserved, should be cleared.
Table 11-12. TDAR Field Descriptions
®
Integrated Microprocessor User’s Manual, Rev. 3
25
X_DES_ACTIVE
0000_0000_0000_0000
0000_0000_0000_0000
MBAR +0x854
Read/Write
Read/Write
24
—
Description
23
Figure 11-10
—
Freescale Semiconductor
describes this
16
0