MCF5272VF66 Freescale Semiconductor, MCF5272VF66 Datasheet - Page 289

• Manufacturer Part Number: MCF5272VF66
• Description: IC MPU 32BIT 66MHZ 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VF66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

12.4
This section describes architecture and applications.
12.4.1
At power-up, the USB module should be initialized within 20 ms if the USB port is connected. This time
corresponds to the 10 ms reset signaling and 10 ms reset recovery time when a device is detected. The
following steps are necessary to initialize the USB module for operation:
12.4.2
Although the USB module handles the SET_CONFIGURATION and SET_INTERFACE requests, the
user is still required to perform some initialization when the configuration or alternate settings change. A
configuration or alternate setting change is signaled by the DEV_CFG interrupt. The following steps are
required to service the DEV_CFG interrupt.
Freescale Semiconductor
1. Clear EP0CTL[CFG_RAM_VAL,USB_EN].
2. Load the configuration RAM with the descriptors from external ROM. The starting configuration
3. Select the internal or external USB transceiver in EPC0TL.
4. Write IEP0CFG and OEP0CFG to initialize the EP0 IN and OUT FIFOs.
5. Initialize the EP0 interrupt vectors.
6. Clear all interrupt bits in EP0ISR.
7. Enable the desired EP0 interrupt sources in EP0IMR.
8. Set EP0CTL[USB_EN, CFG_RAM_VALID].
1. Read EPSR0 and ASR to determine the current configuration and alternate settings.
2. Read the endpoint descriptors for the current configuration and alternate settings to determine the
3. Write EPnCFG for all active endpoints to initialize the FIFOs.
4. Initialize the interrupt vectors for the active endpoints.
5. Clear all interrupt bits in the EPnISR registers for all active endpoints.
6. Enable the desired interrupt sources in the EPnIMR registers.
7. Clear the DEV_CFG interrupt bit to allow the USB module to access the FIFOs.
RAM address is MBAR + 0x1400.
endpoint type and maximum packet size for all of the active endpoints.
Software Architecture and Application Notes
USB Module Initialization
USB Configuration and Interface Changes
MCF5272 ColdFire
®
Integrated Microprocessor User’s Manual, Rev. 3
Universal Serial Bus (USB)
12-31