SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 91

• Manufacturer Part Number: SAF-C161U-LF V1.3
• Description: IC MCU ISDN 16BIT TTL TQFP-100
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAF-C161U-LF V1.3

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 36MHz
• Connectivity: EBI/EMI, SPI, UART/USART, USB
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Type: ROMless
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Other names: SAFC161ULFV1.3X; SAFC161ULFV13XP; SP000007502

2. In packet transfer mode, a COUNT2 value change from 0001
In these cases the CPU is requested to update the PEC control and pointer registers
while the next block transfer is executed. The last block transfer is determined by the
missing link bit in the linked PEC control register. If a service request hits a linked
channel with a COUNT field equal to 00H and the channel link flag disabled, a standard
interrupt is performed as known from standard PEC channels.
CLISNC (FFA8
Packet Transfer control bit PT is implemented only in PECC0 and PECC2. When set
to ’1’, this bit enables the Packet Transfer mode. In this mode, each service request
initiates the transfer of an entire data packet of a fixed size. The COUNT field in the
PECCx register is used to define the size of the packet (in number of bytes or words
depending on the value of BWT). Therefore packets up to 256 bytes/words may be
transfered.
The register PECXC0/2 is then used to specify the number of requests to be serviced by
a PEC packet transfer before activating the interrupt service routine, which is associated
with the priority level. After each PEC packet transfer, the COUNT2 field is decremented
and the request flag is cleared, and then when COUNT2 reaches 0000
request is generated to the corresponding interrupt vector.
Note: In the C161U, the packet size is limited to 1. Packet transfers are not supported,
Data Sheet
Bit
xxIE
xxIR
15
-
-
PEC channel and the CL flag is set in the respective PEC control register.
but the extended transfer count COUNT2 is used when PT bit is set.
14
-
-
C6
13
IR
rw
H
Function
Channel Link Interrupt Enable Bit (individual for each pair of linked
channels)
’0’:
’1’:
Channel Service Request Flag
’0’:
’1’:
/ D4
C6
rw
12
IE
H
)
Interrupt request disabled
Interrupt request enabled
No channel link service request pending
The channel pair has raised a request to service a PEC channel
after channel link
11
-
-
10
-
-
C4
rw
IR
9
C4
rw
IE
8
SFR
91
7
-
-
6
-
-
C2
IR
rw
5
C2
IE
rw
4
Central Processor Unit
H
Reset Value: 0000
3
-
-
to 0000
2
-
-
H
, an interrupt
H
C0
in a linked
IR
rw
2001-04-19
1
C161U
C0
rw
IE
0
H