SAF-C161U-LF V1.3 Infineon Technologies, SAF-C161U-LF V1.3 Datasheet - Page 188
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SAF-C161U-LF V1.3
Manufacturer Part Number
SAF-C161U-LF V1.3
Description
IC MCU ISDN 16BIT TTL TQFP-100
Manufacturer
Infineon Technologies
Series
C16xxr
Datasheet
1.SAF-C161U-LF_V1.3.pdf
(469 pages)
Specifications of SAF-C161U-LF V1.3
Core Processor
C166
Core Size
16-Bit
Speed
36MHz
Connectivity
EBI/EMI, SPI, UART/USART, USB
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Type
ROMless
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
SAFC161ULFV1.3X
SAFC161ULFV13XP
SP000007502
SAFC161ULFV13XP
SP000007502
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Data Sheet
Figure 47
ALE Length Control
The length of the ALE signal and the address hold time after its falling edge are
controlled by the ALECTLx bits in the BUSCON registers. When bit ALECTL is set to ‘1’,
external bus cycles accessing the respective address window will have their ALE signal
prolonged by half a CPU clock. Also the address hold time after the falling edge of ALE
(on a multiplexed bus) will be prolonged by half a CPU clock, so the data transfer within
a bus cycle refers to the same CLKOUT edges as usual (ie. the data transfer is delayed
by one CPU clock). This allows more time for the address to be latched.
Note: ALECTL0 is ‘1’ after reset to select the slowest possible bus cycle, the other
ALE
ADDR
RD/WR
DATA
ALECTLx are ‘0’ after reset.
Programmable External Bus Cycle
ALECTL
ALE
ADDR
RD/WR
DATA
188
MCTC
External Bus Interface
MTTC
MCD02225
2001-04-19
C161U
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