MC9S08DN32ACLH Freescale Semiconductor, MC9S08DN32ACLH Datasheet - Page 336

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MC9S08DN32ACLH

Manufacturer Part Number
MC9S08DN32ACLH
Description
IC MCU 32K FLASH 1.5K RAM 64LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DN32ACLH

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Processor Series
S08DN
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
I2C, SCI, SPI
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Appendix B Timer Pulse-Width Modulator (TPMV2)
When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
B.2.3
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from 0x0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overflow flag (TOF) becomes set. Writing
to TPMxMODH or TPMxMODL inhibits TOF and overflow interrupts until the other byte is written. Reset
sets the TPM counter modulo registers to 0x0000, which results in a free-running timer counter (modulo
disabled).
It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well
before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the first counter overflow will occur.
336
Reset
Reset
Reset
W
W
W
R
R
R
Bit 15
Timer Counter Modulo Registers (TPMxMODH:TPMxMODL)
Bit 7
Bit 7
0
0
0
7
7
7
Figure B-5. Timer Counter Modulo Register High (TPMxMODH)
Figure B-6. Timer Counter Modulo Register Low (TPMxMODL)
14
6
0
0
6
0
6
6
6
Figure B-4. Timer Counter Register Low (TPMxCNTL)
MC9S08DN60 Series Data Sheet, Rev 3
Any write to TPMxCNTL clears the 16-bit counter.
13
5
0
0
5
0
5
5
5
12
4
0
0
4
0
4
4
4
11
3
3
0
3
0
3
3
0
10
2
0
0
2
0
2
2
2
Freescale Semiconductor
1
0
9
0
1
0
1
1
1
Bit 0
Bit 8
Bit 0
0
0
0
0
0
0

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