MC9S08DN32ACLH Freescale Semiconductor, MC9S08DN32ACLH Datasheet - Page 176

• Manufacturer Part Number: MC9S08DN32ACLH
• Description: IC MCU 32K FLASH 1.5K RAM 64LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DN32ACLH

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-LQFP
• Processor Series: S08DN
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C, SCI, SPI
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 10 Analog-to-Digital Converter (S08ADC12V1)
If the MODE bits are changed, any data in ADCRH becomes invalid.
10.3.4
ADCRL contains the lower eight bits of the result of a 12-bit or 10-bit conversion, and all eight bits of an
8-bit conversion. This register is updated each time a conversion completes except when automatic
compare is enabled and the compare condition is not met. When a compare event does occur, the value is
the addition of the conversion result and the two’s complement of the compare value. In 12-bit and 10-bit
mode, reading ADCRH prevents the ADC from transferring subsequent conversion results into the result
registers until ADCRL is read. If ADCRL is not read until the after next conversion is completed, the
intermediate conversion results are lost. In 8-bit mode, there is no interlocking with ADCRH. If the MODE
bits are changed, any data in ADCRL becomes invalid.
10.3.5
In 12-bit mode, the ADCCVH register holds the upper four bits of the 12-bit compare value. When the
compare function is enabled, these bits are compared to the upper four bits of the result following a
conversion in 12-bit mode.
176
Reset:
Reset:
Reset:
W
W
W
R
R
R
Data Result Low Register (ADCRL)
Compare Value High Register (ADCCVH)
ADR7
7
0
0
7
0
7
0
0
Figure 10-7. Compare Value High Register (ADCCVH)
ADR6
Figure 10-5. Data Result High Register (ADCRH)
Figure 10-6. Data Result Low Register (ADCRL)
0
0
0
0
0
6
6
6
MC9S08DN60 Series Data Sheet, Rev 3
ADR5
0
0
0
0
0
5
5
5
ADR4
0
0
0
0
0
4
4
4
ADCV11
ADR11
ADR3
0
0
0
3
3
3
ADCV10
ADR10
ADR2
0
0
0
2
2
2
ADCV9
ADR9
ADR1
Freescale Semiconductor
0
0
0
1
1
1
ADCV8
ADR8
ADR0
0
0
0
0
0
0