MC68376BAMAB20 Freescale Semiconductor, MC68376BAMAB20 Datasheet - Page 381

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MC68376BAMAB20

Manufacturer Part Number
MC68376BAMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BAMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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D.7.9 MCSM Counter Registers
MCSM2CNT — MCSM2 Counter Register
MCSM11CNT — MCSM11 Counter Register
D.7.10 MCSM Modulus Latch Registers
MCSM2ML — MCSM2 Modulus Latch
MCSM11ML — MCSM11 Modulus Latch
D.7.11 DASM Status/Interrupt/Control Registers
DASM3SIC — DASM3 Status/Interrupt/Control Register
DASM4SIC — DASM4 Status/Interrupt/Control Register
DASM9SIC — DASM9 Status/Interrupt/Control Register
DASM10SIC — DASM10 Status/Interrupt/Control Register
FLAG — Event Flag
MC68336/376
USER’S MANUAL
FLAG
15
15
15
0
0
0
RESET:
RESET:
RESET:
The MCSM counter register is a read/write register. A read returns the current value
of the counter. A write simultaneously loads both the counter and the MCSM modulus
latch with the specified value. The counter then begins incrementing from this new
value.
The MCSM modulus latch register is a read/write register. A read returns the current
value of the latch. A write pre-loads the latch with a new value that the modulus
counter will begin counting from when the next load condition occurs.
This status bit indicates whether or not an input capture or output compare event has
occurred. If the IL[2:0] field is non-zero, an interrupt request is generated when the
FLAG bit is set.
Table D-44 shows the status of the FLAG bit in different DASM operating modes.
0 = An input capture or output compare event has not occurred
1 = An input capture or output compare event has occurred
14
14
14
0
0
0
IL[2:0]
13
13
13
0
0
0
12
12
12
0
0
0
IARB3
11
11
11
0
0
0
USED
NOT
10
10
10
0
0
REGISTER SUMMARY
WOR
9
0
9
0
9
0
BSL
8
0
8
0
8
0
IN
U
7
0
7
0
7
FORCA FORCB EDPOL
6
0
6
0
6
0
5
0
5
0
5
0
4
0
4
0
4
0
3
0
3
0
3
0
2
0
2
0
2
0
MODE[3:0]
$YFF45A
$YFF45C
MOTOROLA
$YFF412
$YFF414
$YFF418
$YFF420
$YFF448
$YFF450
1
0
1
0
1
0
D-63
0
0
0
0
0
0

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