MC68376BAMAB20 Freescale Semiconductor, MC68376BAMAB20 Datasheet - Page 221

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MC68376BAMAB20

Manufacturer Part Number
MC68376BAMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BAMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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10.5.1 CPSM Registers
10.6 Free-Running Counter Submodule (FCSM)
MC68336/376
USER’S MANUAL
The CPSM contains a control register (CPCR) and a test register (CPTR). All unused
bits and reserved address locations return zero when read. Writes to unused bits and
reserved address locations have no effect. Refer to D.7.4 CPSM Control Register
and D.7.5 CPSM Test Register for information concerning CPSM register and bit de-
scriptions.
The free-running counter submodule (FCSM) has a 16-bit up counter with an associ-
ated clock source selector, selectable time-base bus drivers, control registers, status
bits, and interrupt logic. When the 16-bit up counter overflows from $FFFF to $0000,
an optional overflow interrupt request can be generated. The current state of the 16-
bit counter is the primary output of the counter submodules. The user can select which,
if any, time base bus is to be driven by the 16-bit counter. A software control register
selects whether the clock input to the counter is one of the taps from the prescaler or
an input pin. The polarity of the external input pin is also programmable.
In order to count, the FCSM requires the CPSM clock signals to be present. After re-
set, the FCSM does not count until the prescaler in the CPSM starts running (when the
software sets the PRUN bit). This allows all counters in the CTM4 submodules to be
synchronized.
The CTM4 has one FCSM. Figure 10-3 shows a block diagram of the FCSM.
INPUT PIN
CTM2C
6 CLOCKS (PCLK[1:6]) FROM PRESCALER
SUBMODULE BUS
DETECT
EDGE
Figure 10-3 FCSM Block Diagram
CONFIGURABLE TIMER MODULE 4
TBBA
CONTROL REGISTER BITS
IN
TBBB
SELECT
CLK2
CLOCK
CLK1 CLK0
16-BIT UP COUNTER
SELECT
BUS
CONTROL REGISTER BITS
COF
TIME BASE BUSES
CONTROL REGISTER BITS
DRVA DRVB
OVERFLOW
IL2
IL1
IL1
IL0
INTERRUPT
CONTROL
IARB3
MOTOROLA
CTM FCSM BLOCK
10-5

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