MC68376BAMAB20 Freescale Semiconductor, MC68376BAMAB20 Datasheet - Page 265

• Manufacturer Part Number: MC68376BAMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BAMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

13.4.3.1 Configuring the TouCAN Bit Timing
13.4.4 Error Counters
MC68336/376
USER’S MANUAL
The following considerations must be observed when programming bit timing func-
tions.
The TouCAN has two error counters, the transmit (TX) error counter and the receive
(RX) error counter. Refer to APPENDIX D REGISTER SUMMARY for more informa-
tion on error counters. The rules for increasing and decreasing these counters are de-
scribed in the CAN protocol, and are fully implemented in the TouCAN. Each counter
has the following features:
Table 13-8 Example System Clock, CAN Bit Rate and S-Clock Frequencies
System Clock
Frequency
• If the programmed PRESDIV value results in a single system clock per one time
• If the programmed PRESDIV value results in a single system clock per one time
• If the prescaler and bit timing control fields are programmed to values that result
• The TouCAN bit time must be programmed to be greater than or equal to nine
• 8-bit up/down counter
• Increment by 8 (RX error counter also increments by one)
• Decrement by one
• Avoid decrement when equal to zero
• RX error counter reset to a value between 119 and 127 inclusive, when the
• Following reset, both counters reset to zero
• Detect values for error passive, bus off and error active transitions
quantum, then the PSEG2 field in CANCTRL2 register should not be pro-
grammed to zero.
quantum, then the information processing time (IPT) equals three time quanta,
otherwise it equals two time quanta. If PSEG2 equals two, then the TouCAN
transmits one time quantum late relative to the scheduled sync segment.
in fewer than ten system clock periods per CAN bit time and the CAN bus loading
is 100%, anytime the rising edge of a start-of-frame (SOF) symbol transmitted by
another node occurs during the third bit of the intermission between messages,
the TouCAN may not be able to prepare a message buffer for transmission in time
to begin its own transmission and arbitrate against the message which transmit-
ted the early SOF.
system clocks, or correct operation is not guaranteed.
TouCAN transitions from error passive to error active
(MHz)
25
20
16
25
20
16
CAN Bit-Rate
(MHz)
0.125
0.125
0.125
1
1
1
CAN 2.0B CONTROLLER MODULE (TouCAN)
Possible S-Clock
Frequency (MHz)
1, 1.25, 2.5
1, 2, 2.5
10, 20
8, 16
1, 2
25
Possible Number of
Time Quanta/Bit
8, 16, 20
8,10, 20
10, 20
8, 16
8,16
25
PRESDIV Value + 1
25, 20,10
20, 10, 8
16, 8
2, 1
2, 1
1
MOTOROLA
13-9