C8051F321 Silicon Laboratories Inc, C8051F321 Datasheet - Page 114
C8051F321
Manufacturer Part Number
C8051F321
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet
1.C8051F320R.pdf
(256 pages)
Specifications of C8051F321
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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C8051F320/1
12.2. Accessing USB FIFO Space
The upper 1k of XRAM functions as USB FIFO space. Figure 12.2 shows an expanded view of the FIFO space and
user XRAM. FIFO space is accessed via USB FIFO registers; see
for more information on accessing these FIFOs. The MOVX instruction should not be used to load or modify USB
data in the FIFO space.
Unused areas of the FIFO space may be used as general purpose XRAM, accessible as described in
FIFO block operates on the USB clock domain; thus the USB clock must be active when accessing FIFO space. Note
that the number of SYSCLK cycles required by the MOVX instruction is increased when accessing USB FIFO space.
Important Note: The USB clock must be active when accessing FIFO space.
114
User XRAM Space
(System Clock Domain)
0x03FF
Figure 12.2. XRAM Memory Map Expanded View
0x0000
(1024 bytes)
User XRAM
Rev. 1.1
0x07C0
0x07BF
0x07FF
0x0740
0x073F
0x0640
0x063F
0x0440
0x043F
0x0400
Section “15.5. FIFO Management” on page 151
(128 bytes)
(256 bytes)
(512 bytes)
Endpoint0
Endpoint1
Endpoint2
Endpoint3
(64 bytes)
(64 bytes)
Free
USB FIFO Space
(USB Clock Domain)
Section
12.1. The
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