MPC564MZP66 Freescale Semiconductor, MPC564MZP66 Datasheet - Page 630

• Manufacturer Part Number: MPC564MZP66
• Description: IC MCU 512K FLASH 66MHZ 388-BGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564MZP66

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Queued Serial Multi-Channel Module
15.5.2
PQSPAR determines which of the QSPI pins, with the exception of the SCK pin, are used by the QSPI
submodule, and which pins are available for general-purpose I/O. Pins may be assigned on a pin-by-pin
basis. If the QSPI is disabled, the SCK pin is automatically assigned its general-purpose I/O function
(QGPIO6).
QSPI pins designated by PQSPAR as general-purpose I/O pins are controlled only by PQSDDR and
PQSPDR; the QSPI has no effect on these pins. PQSPAR does not affect the operation of the SCI
submodule.
Table 15-9
15-12
SRESET
Field
Addr
summarizes the QSMCM pin functions.
PORTQS Pin Assignment Register (PQSPAR)
MSB
0
1
0000
—
2
PORTQS Function
3
QGPIO6
QGPIO5
QGPIO4
QGPIO3
QGPIO2
QGPIO1
QGPIO0
Figure 15-7. PORTQS — Port QS Data Register
QGPO2
QGPO1
QGPI2
QGPI1
QDR
XD2
MPC561/MPC563 Reference Manual, Rev. 1.2
4
0
Table 15-9. QSMCM Pin Functions
QDT
XD2
1
5
QDR
XD1
QSMCM Function
0
6
RXD2
TXD2
RXD1
TXD1
PCS3
PCS2
PCS1
PCS0
MOSI
MISO
QDT
XD1
SCK
1
7
0x30 5014
0
0
8
QDP
CS3
0
9
Alternate Function
C_CNRX0
QDP
C_CNTX0
CS2
10
0
—
—
—
—
—
—
—
—
—
QDP
CS1
11
0
QDPC
S0
12
0
Freescale Semiconductor
QDS
CK
13
0
QDM
OSI
14
0
QDM
ISO
LSB
15
0