MCF5307CFT66B Freescale Semiconductor, MCF5307CFT66B Datasheet - Page 106
MCF5307CFT66B
Manufacturer Part Number
MCF5307CFT66B
Description
IC MPU 32BIT 66MHZ COLDF 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307CFT66B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-FQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
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Company:
Part Number:
MCF5307CFT66B
Manufacturer:
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Cache Organization
A set is a group of four lines (one from each level, or way), corresponding to the same index
into the cache array.
4.8.1 Cache Line States: Invalid, Valid-Unmodified, and
As shown in Table 4-3, a cache line can be invalid, valid-unmodified (often called
exclusive), or valid-modified.
A valid line can be explicitly invalidated by executing a CPUSHL instruction.
4-8
Set 0
Set 1
Set 126
Set 127
V
0
1
1
Where:
TAG—21-bit address tag
V—Valid bit for line
M—Modified bit for line
Valid-Modified
M
0
1
x
TAG
Invalid. Invalid lines are ignored during lookups.
Valid, unmodified. Cache line has valid data that matches system memory.
Valid, modified. Cache line contains most recent data, data at system memory location is stale.
Way 0
Figure 4-3. Cache Organization and Line Format
•
•
•
Table 4-3. Valid and Modified Bit Settings
V M
Freescale Semiconductor, Inc.
For More Information On This Product,
Longword 0
Go to: www.freescale.com
MCF5307 User’s Manual
Way 1
Line
•
•
•
Cache Line Format
Longword 1
Description
Way 2
•
•
•
Longword 2
Longword 3
Way 3
•
•
•
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