MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 110
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68332ACFC25
Manufacturer Part Number
MC68332ACFC25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Specifications of MC68332ACFC25
Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68332ACFC25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68332ACFC25
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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NOTE:
1. Privileged instruction.
5.8.1 M68000 Family Compatibility
5-12
It is the philosophy of the M68000 family that all user-mode programs can execute un-
changed on a more advanced processor, and supervisor-mode programs and excep-
tion handlers should require only minimal alteration.
The CPU32 can be thought of as an intermediate member of the M68000 Family. Ob-
ject code from an MC68000 or MC68010 may be executed on the CPU32, and many
of the instruction and addressing mode extensions of the MC68020 are also support-
ed. Refer to the CPU32 reference manual for a detailed comparison of the CPU32 and
MC68020 instruction set.
TBLSN/TBLUN
TBLS/TBLU
TRAPcc
TRAPV
STOP
SWAP
SBCD
SUBA
SUBQ
SUBX
TRAP
UNLK
SUBI
RTR
SUB
RTS
TST
Scc
1
#<data>, <ea>
#<data>, <ea>
Dym : Dyn, Dn
Dym : Dyn, Dn
– (An), – (An)
– (An), – (An)
Freescale Semiconductor, Inc.
<ea>, Dn
Dn, <ea>
<ea>, An
<ea>, Dn
<ea>, Dn
#<data>
#<data>
#<data>
Dn, Dn
Dn, Dn
For More Information On This Product,
Table 5-1 Instruction Set Summary
Í
none
none
Í
none
none
Dn
An
CENTRAL PROCESSING UNIT
Go to: www.freescale.com
8, 16, 32
8
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
16, 32
none
none
none
none
none
16
16
32
8
8
If condition true, then destination bits are set to 1;
SSP – 2
SSP – 4
Destination
Source – 0, to set condition codes
(SP)
Destination – Source – X
If V set, then overflow TRAP exception
An
Destination – Source
Destination – Source
else, destination bits are cleared to 0
(Temp * Dn [7 : 0]) / 256
Destination – Data
Destination – Data
If cc true, then TRAP exception
(Temp * Dn [7 : 0])
(Dym * 256) + Temp
(SP)
CCR; SP + 2
SSP; format/vector offset
SP; (SP)
10
vector address
SSP; PC
Dyn – Dym
Dyn – Dym
Dym + Temp
Data
– Source
MSW
SP + 4
PC; SP + 4
SR; STOP
An, SP + 4
10
(SSP); SR
LSW
– X
SP; (SP)
Temp
Temp
SP
Destination
Destination
USER’S MANUAL
Destination
Destination
Dn
PC
Temp
Destination
SP
Dn
Destination
Temp
SP
(SSP);
MC68332
PC;
(SSP);
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