ST7FMC1K2B6 STMicroelectronics, ST7FMC1K2B6 Datasheet - Page 164

MCU 8BIT 8K FLASH 32DIP

ST7FMC1K2B6

Manufacturer Part Number
ST7FMC1K2B6
Description
MCU 8BIT 8K FLASH 32DIP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FMC1K2B6

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
LINSCI
Peripherals
LVD, Motor Control PWM, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-DIP (0.600", 15.24mm)
For Use With
497-8402 - BOARD EVAL COMPLETE INVERTER497-8400 - KIT IGBT PWR MODULE CTRL ST7MC497-4734 - EVAL KIT 3KW POWER DRIVER BOARD497-4733 - EVAL KIT 1KW POWER DRIVER BOARD497-4732 - EVAL KIT 300W POWER DRIVER BOARD497-4731 - EVAL KIT PWR DRIVER CONTROL BRD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
497-4864
ST7MC1xx/ST7MC2xx
MOTOR CONTROLLER (Cont’d)
10.6.6.11 Speed Sensor Mode
This mode is entered whenever the Tacho Edge
Selection bits in the MPAR register are not both re-
set (TES[1:0] = 01, 10 or 11). The corresponding
block diagram is shown in
Either Incremental Encoder or Tachogenerator-
type speed sensor can be selected with the IS[1:0]
bits in the MPHST register.
10.6.6.12 Tachogenerator Mode (IS[1:0] = 00, 01
or 10)
Any of the MCIx input pins can be used as a tacho-
generator input, with a digital signal (externally
amplified for instance); the two remaining pins can
be used as standard I/O ports.
A digital multiplexer connects the chosen MCIx in-
put to an edge detection block. Input selection is
done with the IS[1:0] bits in the MPHST register.
An edge selection block is used to select one of
three ways to trigger capture events: rising edge,
falling edge or both rising and falling edge sensi-
Figure 88. Input Stage in Speed Sensor Mode (TES[1:0] bits = 01, 10, 11)
164/309
1
Tacho
Tacho
Tacho
Encoder
Encoder
Free I/O
§
§
§
or
or
or
MCIA
MCIB
MCIC
Input Block
Figure
88.
00
01
10
Input
Input Comparator Block
n
Sel
MPHST Register
IS[1:0]
tive; set-up is done with the TES[1:0] bits (keeping
in mind that TES[1:0] = 00 configuration is re-
served for Position Sensor / Sensorless Modes).
Having only one edge selected eliminates any in-
coming signal dissymmetry, which may due to
pole-to-pole magnet dissymmetry or from a com-
parator threshold with low level signals.
Figure 89
ly with different tacho input and TES bit settings.
Note on Hall Sensors: This configuration is also
suitable for motors using 3 hall sensors for position
detection and not driven in six-step mode (refer to
“Speed Measurement Mode” on page
Note on initializing the Input Stage: As the
IS[1:0] bits in the MPHST register are preload bits
(new values taken into account at C event), the in-
itialization value of the IS[1:0] bits has to be en-
tered in Direct Access mode. This is done by set-
ting the DAC bit in the MCRA register during the
speed sensor input initialization routine.
MPAR Register
or
TES[1:0]
presents the signals generated internal-
or
In2
In1
Incremental
§
interface
Encoder
= According to IS[1:0] bits setting
Event Detection
Capture
Tacho
Clk
D
MCRC Register
Direction
EDIR bit
Encoder
Clock
180).

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