AT91SAM7S512-MU-999 Atmel, AT91SAM7S512-MU-999 Datasheet - Page 620
![IC MCU ARM7 512KB FLASH 64-VQFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT91SAM7S512-MU-999
Manufacturer Part Number
AT91SAM7S512-MU-999
Description
IC MCU ARM7 512KB FLASH 64-VQFN
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S512-MU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- Current page: 620 of 779
- Download datasheet (11Mb)
40.6.10
40.6.10.1
40.6.10.2
40.6.10.3
40.6.11
40.6.11.1
620
AT91SAM7S Series Preliminary
Synchronous Serial Controller (SSC)
Two-wire Interface (TWI)
SSC: Periodic Transmission Limitations in Master Mode
SSC: Transmitter Limitations in Slave Mode
SSC: Transmitter Limitations in Slave Mode
TWI: Clock Divider
If the Least Significant Bit is sent first (MSBF = 0), the first TAG during the frame synchro is not
sent.
None.
If TK is programmed as output and TF is programmed as input, it is impossible to emit data
when the start of edge (rising or falling) of synchro has a Start Delay equal to zero.
None.
If TK is programmed as an input and TF is programmed as an output and requested to be set to
low/high during data emission, the Frame Synchro signal is generated one bit clock period after
the data start and one data bit is lost. This problem does not exist when generating a periodic
synchro.
The data need to be delayed for one bit clock period with an external assembly. In the following
schematic, TD, TK and NRST are AT91SAM7S signals, TXD is the delayed data to connect to
the device.
The value of CLDIV x 2
be less than or equal to 8191
None.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
CKDIV
must be less than or equal to 8191, the value of CHDIV x 2
6175K–ATARM–30-Aug-10
CKDIV
must
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