AT91SAM7S512-MU-999 Atmel, AT91SAM7S512-MU-999 Datasheet - Page 339
![IC MCU ARM7 512KB FLASH 64-VQFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
AT91SAM7S512-MU-999
Manufacturer Part Number
AT91SAM7S512-MU-999
Description
IC MCU ARM7 512KB FLASH 64-VQFN
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S512-MU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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30.9.5.5
Figure 30-29. Repeated Start + Reversal from Read to Write Mode
Figure 30-30. Repeated Start + Reversal from Write to Read Mode
Notes:
6175K–ATARM–30-Aug-10
TWI_RHR
TWI_RHR
TWI_THR
TWI_THR
TXCOMP
TXCOMP
EOSACC
EOSACC
SVREAD
SVREAD
Reversal of Read to Write
Reversal of Write to Read
RXRDY
RXRDY
SVACC
SVACC
TXRDY
TXRDY
TWD
TWD
1. In this case, if TWI_THR has not been written at the end of the read command, the clock is automatically stretched before
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
the ACK.
Reversal after a Repeated Start
S
S
As soon as a START is detected
As soon as a START is detected
SADR
SADR
The master initiates the communication by a read command and finishes it by a write command.
Figure 30-29 on page 339
1. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
The master initiates the communication by a write command and finishes it by a read com-
mand.Figure 30-30 on page 339
mode.
W
R
Read TWI_RHR
A
A
DATA0
DATA0
DATA0
A
A
DATA0
DATA1
DATA1
DATA1
describes the repeated start + reversal from Read to Write mode.
NA
A
describes the repeated start + reversal from Write to Read
AT91SAM7S Series Preliminary
DATA1
Sr
Sr
SADR
SADR
Cleared after read
Cleared after read
R
W
DATA2
A
A
DATA2
DATA2
DATA2
A
A
DATA3
DATA3
DATA3
DATA3
NA
A
P
P
339
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