AT91SAM7S512-MU-999 Atmel, AT91SAM7S512-MU-999 Datasheet - Page 340
AT91SAM7S512-MU-999
Manufacturer Part Number
AT91SAM7S512-MU-999
Description
IC MCU ARM7 512KB FLASH 64-VQFN
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S512-MU-999
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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30.9.6
Figure 30-31. Read Write Flowchart in Slave Mode
340
AT91SAM7S Series Preliminary
Read Write Flowcharts
SADR + MSDIS + SVEN
Set the SLAVE mode:
Read Status Register
EOSACC = 1 ?
TXCOMP = 1 ?
SVACC = 1 ?
END
The flowchart shown in
in Slave mode. A polling or interrupt method can be used to check the status bits. The interrupt
method requires that the interrupt enable register (TWI_IER) be configured first.
GACC = 1 ?
Figure 30-31 on page 340
programming sequence
Read TWI_RHR
SVREAD = 0 ?
RXRDY= 0 ?
Decoding of the
Change SADR
Prog seq
OK ?
gives an example of read and write operations
GENERAL CALL TREATMENT
Write in TWI_THR
TXRDY= 1 ?
6175K–ATARM–30-Aug-10
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