AT80C51SND1C-ROTIL Atmel, AT80C51SND1C-ROTIL Datasheet - Page 15
AT80C51SND1C-ROTIL
Manufacturer Part Number
AT80C51SND1C-ROTIL
Description
IC MCU FLASH MP3 DECODER 80-TQFP
Manufacturer
Atmel
Series
80Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT80C51SND1C-ROTIL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Type
ROMless
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
AT80C51SND1CROTIL
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5.3.2
4109L–8051–02/08
PLL Programming
Figure 5-4.
Figure 5-5.
The PLL is programmed using the flow shown in Figure 5-6. As soon as clock generation is
enabled, the user must wait until the lock indicator is set to ensure the clock output is stable. The
PLL clock frequency will depend on MP3 decoder clock and audio interface clock frequencies.
Figure 5-6.
CLOCK
OSC
PLL Block Diagram and Symbol
PLL Filter Connection
PLL Programming Flow
PLLclk
N divider
N6:0
=
OSCclk
---------------------------------------------- -
FILT
N
PLLCON.1
PLLCON.0
PLOCK
PLLEN
+
×
PFLD
Configure Dividers
R9:0 = xxxxxxxxxxb
1
(
Programming
R
N6:0 = xxxxxxb
PLOCK = 1?
PLL Locked?
Enable PLL
PLLRES = 0
PLLEN = 1
+
VSS
1
PLL
)
R
Down
C1
Up
VSS
R divider
R9:0
PFILT
C2
CHP
AT8xC51SND1C
Vref
VCO
PLL Clock Symbol
CLOCK
PLL
PLL
Clock
15
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