ATMEGA162V-8AJ Atmel, ATMEGA162V-8AJ Datasheet - Page 233

• Manufacturer Part Number: ATMEGA162V-8AJ
• Description: IC MCU AVR 16K 5V 8MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162V-8AJ

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -

2513K–AVR–07/09
Table 99. Fuse High Byte
Notes:
Table 100. Fuse Low Byte
Notes:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
Fuse Low Byte
OCDEN
JTAGEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
Fuse Low Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
(1)
1. The SPIEN Fuse is not accessible in SPI Serial Programming mode.
2. The default value of BOOTSZ1:0 results in maximum Boot Size. See
3. Never ship a product with the OCDEN Fuse programmed regardless of the setting of Lock bits
4. If the JTAG interface is left unconnected, the JTAGEN fuse should if possible be disabled. This
1. The default value of SUT1:0 results in maximum start-up time for the default clock source. See
2. The default setting of CKSEL3:0 results in Internal RC Oscillator @ 8 MHz. See
3. The CKOUT Fuse allow the system clock to be output on PortB 0. See
4. See
(3)
(3)
(4)
(4)
details.
and the JTAGEN Fuse. A programmed OCDEN Fuse enables some parts of the clock system
to be running in all sleep modes. This may increase the power consumption.
to avoid static current at the TDO pin in the JTAG interface.
Table 12 on page 39
page 36
page 40
“System Clock Prescaler” on page 41
Bit no
Bit no
for details.
for details.
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Enable OCD
Enable JTAG
Enable Serial Program and Data
Downloading
Watchdog Timer always on
EEPROM memory is preserved
through the Chip Erase
Select Boot Size (see
details)
Select Boot Size (see
details)
Select Reset Vector
Description
Divide clock by 8
Clock Output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
Table 93
Table 93
for details.
for
for
Default value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
Default Value
1 (unprogrammed, OCD
disabled)
0 (programmed, JTAG
enabled)
0 (programmed, SPI prog.
enabled)
1 (unprogrammed)
1 (unprogrammed,
EEPROM not preserved)
0 (programmed)
0 (programmed)
1 (unprogrammed)
ATmega162/V
(1)
(2)
(2)
(2)
Table 93 on page 228
(1)
(2)
“Clock output buffer” on
(2)
(2)
Table 5 on
233
for