ATMEGA64-16AI Atmel, ATMEGA64-16AI Datasheet - Page 289

• Manufacturer Part Number: ATMEGA64-16AI
• Description: IC AVR MCU 64K 16MHZ IND 64-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64-16AI

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ATmega64 Boot
Loader Parameters
2490Q–AVR–06/10
In
are given.
Table 112. Boot Size Configuration
Note:
Table 113. Read-While-Write Limit
Note:
Table 114. Explanation of Different Variables Used in
pointer
Notes:
Section
Read-While-Write (RWW)
No Read-While-Write (NRWW)
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
BOOTSZ
Table 112
Variable
1
1
1
0
0
(1)(2)
1. The different BOOTSZ Fuse configurations are shown in
1. For details about these two section, see
1. Z0: should be zero for all SPM commands, byte select for the LPM instruction.
2. See
278
Z-pointer during Self-programming.
BOOTSZ
through
and
PC[14:7]
“Addressing the Flash During Self-programming” on page 283
PC[6:0]
0
1
0
1
0
14
6
“RWW – Read-While-Write Section” on page 278
Table
Boot
Size
512
words
1024
words
2048
words
4096
words
Corresponding
114, the parameters used in the description of the Self-programming
Z-value
Z15:Z8
Z7:Z1
Z15
Z7
Pages
16
32
4
8
(1)
(1)
Appli-
cation
Flash
Section
0x0000 -
0x7DFF
0x0000 -
0x7BFF
0x0000 -
0x77FF
0x0000 -
0x6FFF
Program Counter page address: Page select,
Program Counter word address: Word select,
Description
Most significant bit in the Program Counter.
(The Program Counter is 15 bits PC[14:0]).
Most significant bit which is used to address the
words within one page (128 words in a page
requires seven bits PC [6:0]).
Bit in Z-register that is mapped to PCMSB.
Because Z0 is not used, the ZPCMSB equals
PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB.
Because Z0 is not used, the ZPAGEMSB
equals PAGEMSB + 1.
for Page Erase and Page Write
for filling temporary buffer (must be zero during
Page Write operation)
“NRWW – No Read-While-Write Section” on page
Boot
Loader
Flash
Section
0x7E00 -
0x7FFF
0x7C00 -
0x7FFF
0x7800 -
0x7FFF
0x7000 -
0x7FFF
Pages
224
32
Figure 137
Figure 136
End
Applic-
ation
Section
0x7DFF
0x7BFF
0x77FF
0x6FFF
Address
0x0000 - 0x6FFF
0x7000 - 0x7FFF
and the Mapping to the Z-
ATmega64(L)
for details about the use of
Boot Reset
Address
(Start Boot
Loader
Section)
0x7C00
0x7800
0x7000
0x7E00
289