ATMEGA323-8AC Atmel, ATMEGA323-8AC Datasheet - Page 68

IC AVR MCU 32K 8MHZ COM 44TQFP

ATMEGA323-8AC

Manufacturer Part Number
ATMEGA323-8AC
Description
IC AVR MCU 32K 8MHZ COM 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA323-8AC

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AC
Preventing EEPROM
Corruption
68
ATmega323(L)
The user should poll the EEWE bit before starting the read operation. If a write operation
is in progress, it is not possible to set the EERE bit, nor to change the EEAR Register.
The calibrated Oscillator is used to time the EEPROM accesses. Table 25 lists the typi-
cal programming time for EEPROM access from the CPU.
Table 25. EEPROM Programming Time.
During periods of low V
age is too low for the CPU and the EEPROM to operate properly. These issues are the
same as for board level systems using the EEPROM, and the same design solutions
should be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too
low. First, a regular write sequence to the EEPROM requires a minimum voltage to
operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the
supply voltage for executing instructions is too low.
EEPROM data corruption can easily be avoided by following these design recommen-
dations (one is sufficient):
Symbol
EEPROM write (from
CPU)
1. Keep the AVR RESET active (low) during periods of insufficient power sup-
2. Keep the AVR core in Power-down sleep mode during periods of low V
3. Store constants in Flash memory if the ability to change memory contents
ply voltage. This can be done by enabling the internal Brown-out Detector
(BOD) if the operating voltage matches the detection level. If not, an external
low V
operation is in progress, the write operation will be completed provided that
the power supply is voltage is sufficient.
This will prevent the CPU from attempting to decode and execute instruc-
tions, effectively protecting the EEPROM Registers from unintentional writes.
from software is not required. Flash memory can not be updated by the CPU
unless the Boot Loader software supports writing to the Flash and the Boot
Lock bits are configured so that writing to the Flash memory from CPU is
allowed. See “Boot Loader Support” on page 177 for details.
CC
Reset Protection circuit can be used. If a Reset occurs while a write
CC,
Number of Calibrated
RC Oscillator Cycles
the EEPROM data can be corrupted because the supply volt-
2048
Min Programming
1.9 ms
Time
Max Programming
1457G–AVR–09/03
3.8 ms
Time
CC
.

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