ATMEGA323-8AC Atmel, ATMEGA323-8AC Datasheet - Page 108
![IC AVR MCU 32K 8MHZ COM 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA323-8AC
Manufacturer Part Number
ATMEGA323-8AC
Description
IC AVR MCU 32K 8MHZ COM 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA323L-4PC.pdf
(247 pages)
Specifications of ATMEGA323-8AC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA3238AC
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Master Transmitter Mode
Master Receiver Mode
108
ATmega323(L)
When the Two-wire Serial Interface Interrupt Flag is set, the status code in TWSR is
used to determine the appropriate software action. For each status code, the required
software action and details of the following serial transfer are given in Table 37 to Table
44.
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave
Receiver (see Figure 55). Before Master Transmitter mode can be entered, the TWCR
must be initialized as follows:
TWEN must be set to enable the Two-wire Serial Interface, TWSTA and TWSTO must
be cleared.
The Master Transmitter mode may now be entered by setting the TWSTA bit. The Two-
wire Serial Interface logic will then test the Two-wire Serial Bus and generate a START
condition as soon as the bus becomes free. When a START condition is transmitted, the
Two-wire Serial Interface Interrupt Flag (TWINT) is set by hardware, and the status code
in TWSR will be $08. TWDR must then be loaded with the slave address and the Data
Direction bit (SLA+W). Clearing the TWINT bit in software will continue the transfer. The
TWINT Flag is cleared by writing a logic one to the flag.
When the slave address and the direction bit have been transmitted and an acknowl-
edgement bit has been received, TWINT is set again and a number of status codes in
TWSR are possible. Possible status codes in Master mode are $18, $20, or $38. The
appropriate action to be taken for each of these status codes is detailed in Table 37. The
data must be loaded when TWINT is high only. If not, the access will be discarded, and
the Write Collision bit – TWWC will be set in the TWCR Register. This scheme is
repeated until the last byte is sent and the transfer is ended by generating a STOP con-
dition or a repeated START condition. A STOP condition is generated by setting
TWSTO, a repeated START condition is generated by setting TWSTA and TWSTO.
After a repeated START condition (state $10) the Two-wire Serial Interface can access
the same Slave again, or a new Slave without transmitting a STOP condition. Repeated
START enables the Master to switch between Slaves, Master Transmitter mode and
Master Receiver mode without loosing control over the bus.
Assembly code illustrating operation of the Master Transmitter mode is given at the end
of the TWI section.
In the Master Receiver mode, a number of data bytes are received from a Slave Trans-
mitter (see Figure 56). The transfer is initialized as in the Master Transmitter mode.
When the START condition has been transmitted, the TWINT Flag is set by hardware.
The software must then load TWDR with the 7-bit slave address and the Data Direction
bit (SLA+R). The transfer will then continue when the TWINT Flag is cleared by
software.
When the slave address and the direction bit have been transmitted and an acknowl-
edgement bit has been received, TWINT is set again and a number of status codes in
TWSR are possible. Possible status codes in Master mode are $40, $48, or $38. The
appropriate action to be taken for each of these status codes is detailed in Table .
Received data can be read from the TWDR Register when the TWINT Flag is set high
by hardware. This scheme is repeated until the last byte has been received and a STOP
condition is transmitted by writing a logic one to the TWSTO bit in the TWCR Register.
TWCR
Value
TWINT
0
TWEA
X
TWSTA
0
TWSTO
0
TWWC
0
TWEN
1
–
0
1457G–AVR–09/03
TWIE
X
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